From e6bffe23c87a9f6de8abdec747600f674b9cab62 Mon Sep 17 00:00:00 2001 From: William Harrington Date: Sat, 27 Jul 2019 22:16:27 -0500 Subject: Copy project files into repo --- build/default/production/beep.i | 1756 +++++++++++++++++++++++++++ build/default/production/beep.p1 | 262 ++++ build/default/production/beep.p1.d | 4 + build/default/production/ds3231.i | 1940 +++++++++++++++++++++++++++++ build/default/production/ds3231.p1 | 693 +++++++++++ build/default/production/ds3231.p1.d | 6 + build/default/production/i2c.i | 1807 +++++++++++++++++++++++++++ build/default/production/i2c.p1 | 410 +++++++ build/default/production/i2c.p1.d | 4 + build/default/production/lcd.i | 1860 ++++++++++++++++++++++++++++ build/default/production/lcd.p1 | 562 +++++++++ build/default/production/lcd.p1.d | 4 + build/default/production/main.i | 2212 ++++++++++++++++++++++++++++++++++ build/default/production/main.p1 | 971 +++++++++++++++ build/default/production/main.p1.d | 8 + build/default/production/uart.i | 1811 ++++++++++++++++++++++++++++ build/default/production/uart.p1 | 363 ++++++ build/default/production/uart.p1.d | 4 + 18 files changed, 14677 insertions(+) create mode 100755 build/default/production/beep.i create mode 100755 build/default/production/beep.p1 create mode 100755 build/default/production/beep.p1.d create mode 100755 build/default/production/ds3231.i create mode 100755 build/default/production/ds3231.p1 create mode 100755 build/default/production/ds3231.p1.d create mode 100755 build/default/production/i2c.i create mode 100755 build/default/production/i2c.p1 create mode 100755 build/default/production/i2c.p1.d create mode 100755 build/default/production/lcd.i create mode 100755 build/default/production/lcd.p1 create mode 100755 build/default/production/lcd.p1.d create mode 100755 build/default/production/main.i create mode 100755 build/default/production/main.p1 create mode 100755 build/default/production/main.p1.d create mode 100755 build/default/production/uart.i create mode 100755 build/default/production/uart.p1 create mode 100755 build/default/production/uart.p1.d (limited to 'build') diff --git a/build/default/production/beep.i b/build/default/production/beep.i new file mode 100755 index 0000000..bcc2925 --- /dev/null +++ b/build/default/production/beep.i @@ -0,0 +1,1756 @@ +# 1 "beep.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "beep.c" 2 +# 1 "./beep.h" 1 +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 1 "./beep.h" 2 + + +void alarm(unsigned int); +# 1 "beep.c" 2 + + + +void alarm(unsigned int numberOfBeeps) { + for (int i = 0; i < numberOfBeeps; i++) { + for (int j = 0; j < 250; j++) { + RD1 = 1; + _delay((unsigned long)((375)*(20000000/4000000.0))); + RD1 = 0; + _delay((unsigned long)((125)*(20000000/4000000.0))); + } + + _delay((unsigned long)((500)*(20000000/4000.0))); + } +} diff --git a/build/default/production/beep.p1 b/build/default/production/beep.p1 new file mode 100755 index 0000000..b3f73f5 --- /dev/null +++ b/build/default/production/beep.p1 @@ -0,0 +1,262 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2752 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2752: extern volatile __bit RD1 __attribute__((address(0x41))); +[v _RD1 `Vb ~T0 @X0 0 e@65 ] +[v F842 `(v ~T0 @X0 1 tf1`ul ] +"92 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic.h +[v __delay `JF842 ~T0 @X0 0 e ] +[p i __delay ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"4 beep.c +[; ;beep.c: 4: void alarm(unsigned int numberOfBeeps) { +[v _alarm `(v ~T0 @X0 1 ef1`ui ] +{ +[e :U _alarm ] +[v _numberOfBeeps `ui ~T0 @X0 1 r1 ] +[f ] +"5 +[; ;beep.c: 5: for (int i = 0; i < numberOfBeeps; i++) { +{ +[v _i `i ~T0 @X0 1 a ] +[e = _i -> 0 `i ] +[e $U 99 ] +[e :U 96 ] +{ +"6 +[; ;beep.c: 6: for (int j = 0; j < 250; j++) { +{ +[v _j `i ~T0 @X0 1 a ] +[e = _j -> 0 `i ] +[e $ < _j -> 250 `i 100 ] +[e $U 101 ] +[e :U 100 ] +{ +"7 +[; ;beep.c: 7: RD1 = 1; +[e = _RD1 -> -> 1 `i `b ] +"8 +[; ;beep.c: 8: _delay((unsigned long)((375)*(20000000/4000000.0))); +[e ( __delay (1 -> * -> -> 375 `i `d / -> -> 20000000 `l `d .4000000.0 `ul ] +"9 +[; ;beep.c: 9: RD1 = 0; +[e = _RD1 -> -> 0 `i `b ] +"10 +[; ;beep.c: 10: _delay((unsigned long)((125)*(20000000/4000000.0))); +[e ( __delay (1 -> * -> -> 125 `i `d / -> -> 20000000 `l `d .4000000.0 `ul ] +"11 +[; ;beep.c: 11: } +} +[e ++ _j -> 1 `i ] +[e $ < _j -> 250 `i 100 ] +[e :U 101 ] +} +"13 +[; ;beep.c: 13: _delay((unsigned long)((500)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 500 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"14 +[; ;beep.c: 14: } +} +[e ++ _i -> 1 `i ] +[e :U 99 ] +[e $ < -> _i `ui _numberOfBeeps 96 ] +[e :U 97 ] +} +"15 +[; ;beep.c: 15: } +[e :UE 95 ] +} diff --git a/build/default/production/beep.p1.d b/build/default/production/beep.p1.d new file mode 100755 index 0000000..32abf0a --- /dev/null +++ b/build/default/production/beep.p1.d @@ -0,0 +1,4 @@ +build/default/production/beep.p1: \ +beep.c \ +beep.h \ +conf.h diff --git a/build/default/production/ds3231.i b/build/default/production/ds3231.i new file mode 100755 index 0000000..717d2e9 --- /dev/null +++ b/build/default/production/ds3231.i @@ -0,0 +1,1940 @@ +# 1 "ds3231.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "ds3231.c" 2 +# 15 "ds3231.c" +# 1 "./ds3231.h" 1 +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 1 "./ds3231.h" 2 + + +int BCD_2_DEC(int); +int DEC_2_BCD(int); +void Read_Alarms_Temp(void); +void Set_Date(void); +void Set_DayOfWeek(void); +void Set_Time(void); +void Set_Time_Date(void); +void Update_Current_Date_Time(void); +void Write_Alarms(void); +# 15 "ds3231.c" 2 + +# 1 "./i2c.h" 1 +void I2C_Master_Init(const unsigned long); +void I2C_Master_Wait(void); +void I2C_Master_Start(void); +void I2C_Master_Repeated_Start(void); +void I2C_Master_Stop(void); +void I2C_Master_Write(unsigned); +unsigned short I2C_Master_Read(unsigned short); +# 16 "ds3231.c" 2 + +# 1 "./main.h" 1 + +unsigned int sec = 30; +unsigned int min = 42; +unsigned int hour = 21; +unsigned int dayofweek = 7; +unsigned int date = 27; +unsigned int month = 7; +unsigned int year = 19; +unsigned int century = 20; +unsigned int alarm1_sec, alarm1_min, alarm1_hour; +unsigned int alarm2_min, alarm2_hour; +unsigned int status_reg, alarm1_status, alarm2_status; +unsigned int control_reg; + + +unsigned int temperature_lsb = 0; +int temperature_msb = 0; +unsigned char temp_sign = ' '; + + +char* weekday; + + +unsigned int sec_chg = 0; + + +unsigned char sec_0, sec_1; +unsigned char min_0, min_1; +unsigned char hour_0, hour_1; +unsigned char day_0, day_1; +unsigned char month_0, month_1; +unsigned char year_0, year_1; +unsigned char temp_0, temp_1, temp_2; +unsigned char alarm1_sec_0, alarm1_sec_1, alarm1_min_0, alarm1_min_1, + alarm1_hour_0, alarm1_hour_1; +unsigned char alarm2_min_0, alarm2_min_1, alarm2_hour_0, alarm2_hour_1; + + +char buf[40]; + + +void format_DateTimeChars(void); + + +void format_Temperature(void); + + +void getWeekDay(unsigned int); + + +void Get_Alarm_Status(void); + +void display_Intro(void); +void display_Lcd_Layout(void); + +void update_Display(void); +# 17 "ds3231.c" 2 + + +int BCD_2_DEC(int to_convert) { + return (to_convert >> 4) * 10 + (to_convert & 0x0F); +} + +int DEC_2_BCD(int to_convert) { + return ((to_convert / 10) << 4) + (to_convert % 10); +} + +void Read_Alarms_Temp() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(0x07); + I2C_Master_Repeated_Start(); + + + I2C_Master_Write(0xD1); + alarm1_sec = BCD_2_DEC(I2C_Master_Read(1)); + alarm1_min = BCD_2_DEC(I2C_Master_Read(1)); + alarm1_hour = BCD_2_DEC(I2C_Master_Read(1)); + I2C_Master_Read(1); + alarm2_min = BCD_2_DEC(I2C_Master_Read(1)); + alarm2_hour = BCD_2_DEC(I2C_Master_Read(1)); + I2C_Master_Read(1); + control_reg = I2C_Master_Read(1); + status_reg = I2C_Master_Read(1); + I2C_Master_Read(1); + + temperature_msb = I2C_Master_Read(1); + + temperature_lsb = I2C_Master_Read(0); + I2C_Master_Stop(); +} + +void Set_Date() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(4); + I2C_Master_Write(DEC_2_BCD(date)); + I2C_Master_Write(DEC_2_BCD(month)); + I2C_Master_Write(DEC_2_BCD(year)); + I2C_Master_Stop(); +} + +void Set_DayOfWeek() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(3); + I2C_Master_Write(dayofweek); + I2C_Master_Stop(); +} + +void Set_Time() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(0); + I2C_Master_Write(DEC_2_BCD(sec)); + I2C_Master_Write(DEC_2_BCD(min)); + I2C_Master_Write(DEC_2_BCD(hour)); + I2C_Master_Stop(); +} + +void Set_Time_Date() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(0); + I2C_Master_Write(DEC_2_BCD(sec)); + I2C_Master_Write(DEC_2_BCD(min)); + I2C_Master_Write(DEC_2_BCD(hour)); + I2C_Master_Write(1); + I2C_Master_Write(DEC_2_BCD(date)); + I2C_Master_Write(DEC_2_BCD(month)); + I2C_Master_Write(DEC_2_BCD(year)); + I2C_Master_Stop(); +} + +void Update_Current_Date_Time() { + + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(0); + I2C_Master_Repeated_Start(); + + + I2C_Master_Write(0xD1); + sec = BCD_2_DEC(I2C_Master_Read(1)); + min = BCD_2_DEC(I2C_Master_Read(1)); + hour = BCD_2_DEC(I2C_Master_Read(1)); + weekday = I2C_Master_Read(1); + date = BCD_2_DEC(I2C_Master_Read(1)); + month = BCD_2_DEC(I2C_Master_Read(1)); + year = BCD_2_DEC(I2C_Master_Read(1)); + I2C_Master_Stop(); + + + + I2C_Master_Start(); + I2C_Master_Write(0xD1); + I2C_Master_Read(1); + I2C_Master_Stop(); +} + +void Write_Alarms() { + I2C_Master_Start(); + I2C_Master_Write(0xD0); + I2C_Master_Write(7); + I2C_Master_Write(0); + I2C_Master_Write(DEC_2_BCD(alarm1_min)); + I2C_Master_Write(DEC_2_BCD(alarm1_hour)); + I2C_Master_Write(0x80); + I2C_Master_Write(DEC_2_BCD(alarm2_min)); + I2C_Master_Write(DEC_2_BCD(alarm2_hour)); + I2C_Master_Write(0x80); + + + I2C_Master_Write(4 | alarm1_status | (alarm2_status << 1)); + I2C_Master_Write(0); + I2C_Master_Stop(); + _delay((unsigned long)((200)*(20000000/4000.0))); +} diff --git a/build/default/production/ds3231.p1 b/build/default/production/ds3231.p1 new file mode 100755 index 0000000..0594743 --- /dev/null +++ b/build/default/production/ds3231.p1 @@ -0,0 +1,693 @@ +Version 4.0 HI-TECH Software Intermediate Code +"3 ./i2c.h +[; ;./i2c.h: 3: void I2C_Master_Start(void); +[v _I2C_Master_Start `(v ~T0 @X0 0 ef ] +"6 +[; ;./i2c.h: 6: void I2C_Master_Write(unsigned); +[v _I2C_Master_Write `(v ~T0 @X0 0 ef1`ui ] +"4 +[; ;./i2c.h: 4: void I2C_Master_Repeated_Start(void); +[v _I2C_Master_Repeated_Start `(v ~T0 @X0 0 ef ] +"7 +[; ;./i2c.h: 7: unsigned short I2C_Master_Read(unsigned short); +[v _I2C_Master_Read `(us ~T0 @X0 0 ef1`us ] +"5 +[; ;./i2c.h: 5: void I2C_Master_Stop(void); +[v _I2C_Master_Stop `(v ~T0 @X0 0 ef ] +[v F842 `(v ~T0 @X0 1 tf1`ul ] +"92 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic.h +[v __delay `JF842 ~T0 @X0 0 e ] +[p i __delay ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"2 ./main.h +[; ;./main.h: 2: unsigned int sec = 30; +[v _sec `ui ~T0 @X0 1 e ] +[i _sec +-> -> 30 `i `ui +] +"3 +[; ;./main.h: 3: unsigned int min = 42; +[v _min `ui ~T0 @X0 1 e ] +[i _min +-> -> 42 `i `ui +] +"4 +[; ;./main.h: 4: unsigned int hour = 21; +[v _hour `ui ~T0 @X0 1 e ] +[i _hour +-> -> 21 `i `ui +] +"5 +[; ;./main.h: 5: unsigned int dayofweek = 7; +[v _dayofweek `ui ~T0 @X0 1 e ] +[i _dayofweek +-> -> 7 `i `ui +] +"6 +[; ;./main.h: 6: unsigned int date = 27; +[v _date `ui ~T0 @X0 1 e ] +[i _date +-> -> 27 `i `ui +] +"7 +[; ;./main.h: 7: unsigned int month = 7; +[v _month `ui ~T0 @X0 1 e ] +[i _month +-> -> 7 `i `ui +] +"8 +[; ;./main.h: 8: unsigned int year = 19; +[v _year `ui ~T0 @X0 1 e ] +[i _year +-> -> 19 `i `ui +] +"9 +[; ;./main.h: 9: unsigned int century = 20; +[v _century `ui ~T0 @X0 1 e ] +[i _century +-> -> 20 `i `ui +] +"10 +[; ;./main.h: 10: unsigned int alarm1_sec, alarm1_min, alarm1_hour; +[v _alarm1_sec `ui ~T0 @X0 1 e ] +[v _alarm1_min `ui ~T0 @X0 1 e ] +[v _alarm1_hour `ui ~T0 @X0 1 e ] +"11 +[; ;./main.h: 11: unsigned int alarm2_min, alarm2_hour; +[v _alarm2_min `ui ~T0 @X0 1 e ] +[v _alarm2_hour `ui ~T0 @X0 1 e ] +"12 +[; ;./main.h: 12: unsigned int status_reg, alarm1_status, alarm2_status; +[v _status_reg `ui ~T0 @X0 1 e ] +[v _alarm1_status `ui ~T0 @X0 1 e ] +[v _alarm2_status `ui ~T0 @X0 1 e ] +"13 +[; ;./main.h: 13: unsigned int control_reg; +[v _control_reg `ui ~T0 @X0 1 e ] +"16 +[; ;./main.h: 16: unsigned int temperature_lsb = 0; +[v _temperature_lsb `ui ~T0 @X0 1 e ] +[i _temperature_lsb +-> -> 0 `i `ui +] +"17 +[; ;./main.h: 17: int temperature_msb = 0; +[v _temperature_msb `i ~T0 @X0 1 e ] +[i _temperature_msb +-> 0 `i +] +"18 +[; ;./main.h: 18: unsigned char temp_sign = ' '; +[v _temp_sign `uc ~T0 @X0 1 e ] +[i _temp_sign +-> -> 32 `ui `uc +] +"21 +[; ;./main.h: 21: char* weekday; +[v _weekday `*uc ~T0 @X0 1 e ] +"24 +[; ;./main.h: 24: unsigned int sec_chg = 0; +[v _sec_chg `ui ~T0 @X0 1 e ] +[i _sec_chg +-> -> 0 `i `ui +] +"27 +[; ;./main.h: 27: unsigned char sec_0, sec_1; +[v _sec_0 `uc ~T0 @X0 1 e ] +[v _sec_1 `uc ~T0 @X0 1 e ] +"28 +[; ;./main.h: 28: unsigned char min_0, min_1; +[v _min_0 `uc ~T0 @X0 1 e ] +[v _min_1 `uc ~T0 @X0 1 e ] +"29 +[; ;./main.h: 29: unsigned char hour_0, hour_1; +[v _hour_0 `uc ~T0 @X0 1 e ] +[v _hour_1 `uc ~T0 @X0 1 e ] +"30 +[; ;./main.h: 30: unsigned char day_0, day_1; +[v _day_0 `uc ~T0 @X0 1 e ] +[v _day_1 `uc ~T0 @X0 1 e ] +"31 +[; ;./main.h: 31: unsigned char month_0, month_1; +[v _month_0 `uc ~T0 @X0 1 e ] +[v _month_1 `uc ~T0 @X0 1 e ] +"32 +[; ;./main.h: 32: unsigned char year_0, year_1; +[v _year_0 `uc ~T0 @X0 1 e ] +[v _year_1 `uc ~T0 @X0 1 e ] +"33 +[; ;./main.h: 33: unsigned char temp_0, temp_1, temp_2; +[v _temp_0 `uc ~T0 @X0 1 e ] +[v _temp_1 `uc ~T0 @X0 1 e ] +[v _temp_2 `uc ~T0 @X0 1 e ] +"34 +[; ;./main.h: 34: unsigned char alarm1_sec_0, alarm1_sec_1, alarm1_min_0, alarm1_min_1, +[v _alarm1_sec_0 `uc ~T0 @X0 1 e ] +[v _alarm1_sec_1 `uc ~T0 @X0 1 e ] +[v _alarm1_min_0 `uc ~T0 @X0 1 e ] +[v _alarm1_min_1 `uc ~T0 @X0 1 e ] +"35 +[; ;./main.h: 35: alarm1_hour_0, alarm1_hour_1; +[v _alarm1_hour_0 `uc ~T0 @X0 1 e ] +[v _alarm1_hour_1 `uc ~T0 @X0 1 e ] +"36 +[; ;./main.h: 36: unsigned char alarm2_min_0, alarm2_min_1, alarm2_hour_0, alarm2_hour_1; +[v _alarm2_min_0 `uc ~T0 @X0 1 e ] +[v _alarm2_min_1 `uc ~T0 @X0 1 e ] +[v _alarm2_hour_0 `uc ~T0 @X0 1 e ] +[v _alarm2_hour_1 `uc ~T0 @X0 1 e ] +"39 +[; ;./main.h: 39: char buf[40]; +[v _buf `uc ~T0 @X0 -> 40 `i e ] +"19 ds3231.c +[; ;ds3231.c: 19: int BCD_2_DEC(int to_convert) { +[v _BCD_2_DEC `(i ~T0 @X0 1 ef1`i ] +{ +[e :U _BCD_2_DEC ] +[v _to_convert `i ~T0 @X0 1 r1 ] +[f ] +"20 +[; ;ds3231.c: 20: return (to_convert >> 4) * 10 + (to_convert & 0x0F); +[e ) + * >> _to_convert -> 4 `i -> 10 `i & _to_convert -> 15 `i ] +[e $UE 95 ] +"21 +[; ;ds3231.c: 21: } +[e :UE 95 ] +} +"23 +[; ;ds3231.c: 23: int DEC_2_BCD(int to_convert) { +[v _DEC_2_BCD `(i ~T0 @X0 1 ef1`i ] +{ +[e :U _DEC_2_BCD ] +[v _to_convert `i ~T0 @X0 1 r1 ] +[f ] +"24 +[; ;ds3231.c: 24: return ((to_convert / 10) << 4) + (to_convert % 10); +[e ) + << / _to_convert -> 10 `i -> 4 `i % _to_convert -> 10 `i ] +[e $UE 96 ] +"25 +[; ;ds3231.c: 25: } +[e :UE 96 ] +} +"27 +[; ;ds3231.c: 27: void Read_Alarms_Temp() { +[v _Read_Alarms_Temp `(v ~T0 @X0 1 ef ] +{ +[e :U _Read_Alarms_Temp ] +[f ] +"28 +[; ;ds3231.c: 28: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"29 +[; ;ds3231.c: 29: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"30 +[; ;ds3231.c: 30: I2C_Master_Write(0x07); +[e ( _I2C_Master_Write (1 -> -> 7 `i `ui ] +"31 +[; ;ds3231.c: 31: I2C_Master_Repeated_Start(); +[e ( _I2C_Master_Repeated_Start .. ] +"34 +[; ;ds3231.c: 34: I2C_Master_Write(0xD1); +[e ( _I2C_Master_Write (1 -> -> 209 `i `ui ] +"35 +[; ;ds3231.c: 35: alarm1_sec = BCD_2_DEC(I2C_Master_Read(1)); +[e = _alarm1_sec -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"36 +[; ;ds3231.c: 36: alarm1_min = BCD_2_DEC(I2C_Master_Read(1)); +[e = _alarm1_min -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"37 +[; ;ds3231.c: 37: alarm1_hour = BCD_2_DEC(I2C_Master_Read(1)); +[e = _alarm1_hour -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"38 +[; ;ds3231.c: 38: I2C_Master_Read(1); +[e ( _I2C_Master_Read (1 -> -> 1 `i `us ] +"39 +[; ;ds3231.c: 39: alarm2_min = BCD_2_DEC(I2C_Master_Read(1)); +[e = _alarm2_min -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"40 +[; ;ds3231.c: 40: alarm2_hour = BCD_2_DEC(I2C_Master_Read(1)); +[e = _alarm2_hour -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"41 +[; ;ds3231.c: 41: I2C_Master_Read(1); +[e ( _I2C_Master_Read (1 -> -> 1 `i `us ] +"42 +[; ;ds3231.c: 42: control_reg = I2C_Master_Read(1); +[e = _control_reg -> ( _I2C_Master_Read (1 -> -> 1 `i `us `ui ] +"43 +[; ;ds3231.c: 43: status_reg = I2C_Master_Read(1); +[e = _status_reg -> ( _I2C_Master_Read (1 -> -> 1 `i `us `ui ] +"44 +[; ;ds3231.c: 44: I2C_Master_Read(1); +[e ( _I2C_Master_Read (1 -> -> 1 `i `us ] +"46 +[; ;ds3231.c: 46: temperature_msb = I2C_Master_Read(1); +[e = _temperature_msb -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i ] +"48 +[; ;ds3231.c: 48: temperature_lsb = I2C_Master_Read(0); +[e = _temperature_lsb -> ( _I2C_Master_Read (1 -> -> 0 `i `us `ui ] +"49 +[; ;ds3231.c: 49: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"50 +[; ;ds3231.c: 50: } +[e :UE 97 ] +} +"52 +[; ;ds3231.c: 52: void Set_Date() { +[v _Set_Date `(v ~T0 @X0 1 ef ] +{ +[e :U _Set_Date ] +[f ] +"53 +[; ;ds3231.c: 53: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"54 +[; ;ds3231.c: 54: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"55 +[; ;ds3231.c: 55: I2C_Master_Write(4); +[e ( _I2C_Master_Write (1 -> -> 4 `i `ui ] +"56 +[; ;ds3231.c: 56: I2C_Master_Write(DEC_2_BCD(date)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _date `i `ui ] +"57 +[; ;ds3231.c: 57: I2C_Master_Write(DEC_2_BCD(month)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _month `i `ui ] +"58 +[; ;ds3231.c: 58: I2C_Master_Write(DEC_2_BCD(year)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _year `i `ui ] +"59 +[; ;ds3231.c: 59: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"60 +[; ;ds3231.c: 60: } +[e :UE 98 ] +} +"62 +[; ;ds3231.c: 62: void Set_DayOfWeek() { +[v _Set_DayOfWeek `(v ~T0 @X0 1 ef ] +{ +[e :U _Set_DayOfWeek ] +[f ] +"63 +[; ;ds3231.c: 63: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"64 +[; ;ds3231.c: 64: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"65 +[; ;ds3231.c: 65: I2C_Master_Write(3); +[e ( _I2C_Master_Write (1 -> -> 3 `i `ui ] +"66 +[; ;ds3231.c: 66: I2C_Master_Write(dayofweek); +[e ( _I2C_Master_Write (1 _dayofweek ] +"67 +[; ;ds3231.c: 67: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"68 +[; ;ds3231.c: 68: } +[e :UE 99 ] +} +"70 +[; ;ds3231.c: 70: void Set_Time() { +[v _Set_Time `(v ~T0 @X0 1 ef ] +{ +[e :U _Set_Time ] +[f ] +"71 +[; ;ds3231.c: 71: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"72 +[; ;ds3231.c: 72: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"73 +[; ;ds3231.c: 73: I2C_Master_Write(0); +[e ( _I2C_Master_Write (1 -> -> 0 `i `ui ] +"74 +[; ;ds3231.c: 74: I2C_Master_Write(DEC_2_BCD(sec)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _sec `i `ui ] +"75 +[; ;ds3231.c: 75: I2C_Master_Write(DEC_2_BCD(min)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _min `i `ui ] +"76 +[; ;ds3231.c: 76: I2C_Master_Write(DEC_2_BCD(hour)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _hour `i `ui ] +"77 +[; ;ds3231.c: 77: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"78 +[; ;ds3231.c: 78: } +[e :UE 100 ] +} +"80 +[; ;ds3231.c: 80: void Set_Time_Date() { +[v _Set_Time_Date `(v ~T0 @X0 1 ef ] +{ +[e :U _Set_Time_Date ] +[f ] +"81 +[; ;ds3231.c: 81: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"82 +[; ;ds3231.c: 82: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"83 +[; ;ds3231.c: 83: I2C_Master_Write(0); +[e ( _I2C_Master_Write (1 -> -> 0 `i `ui ] +"84 +[; ;ds3231.c: 84: I2C_Master_Write(DEC_2_BCD(sec)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _sec `i `ui ] +"85 +[; ;ds3231.c: 85: I2C_Master_Write(DEC_2_BCD(min)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _min `i `ui ] +"86 +[; ;ds3231.c: 86: I2C_Master_Write(DEC_2_BCD(hour)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _hour `i `ui ] +"87 +[; ;ds3231.c: 87: I2C_Master_Write(1); +[e ( _I2C_Master_Write (1 -> -> 1 `i `ui ] +"88 +[; ;ds3231.c: 88: I2C_Master_Write(DEC_2_BCD(date)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _date `i `ui ] +"89 +[; ;ds3231.c: 89: I2C_Master_Write(DEC_2_BCD(month)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _month `i `ui ] +"90 +[; ;ds3231.c: 90: I2C_Master_Write(DEC_2_BCD(year)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _year `i `ui ] +"91 +[; ;ds3231.c: 91: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"92 +[; ;ds3231.c: 92: } +[e :UE 101 ] +} +"94 +[; ;ds3231.c: 94: void Update_Current_Date_Time() { +[v _Update_Current_Date_Time `(v ~T0 @X0 1 ef ] +{ +[e :U _Update_Current_Date_Time ] +[f ] +"96 +[; ;ds3231.c: 96: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"97 +[; ;ds3231.c: 97: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"98 +[; ;ds3231.c: 98: I2C_Master_Write(0); +[e ( _I2C_Master_Write (1 -> -> 0 `i `ui ] +"99 +[; ;ds3231.c: 99: I2C_Master_Repeated_Start(); +[e ( _I2C_Master_Repeated_Start .. ] +"102 +[; ;ds3231.c: 102: I2C_Master_Write(0xD1); +[e ( _I2C_Master_Write (1 -> -> 209 `i `ui ] +"103 +[; ;ds3231.c: 103: sec = BCD_2_DEC(I2C_Master_Read(1)); +[e = _sec -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"104 +[; ;ds3231.c: 104: min = BCD_2_DEC(I2C_Master_Read(1)); +[e = _min -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"105 +[; ;ds3231.c: 105: hour = BCD_2_DEC(I2C_Master_Read(1)); +[e = _hour -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"106 +[; ;ds3231.c: 106: weekday = I2C_Master_Read(1); +[e = _weekday -> ( _I2C_Master_Read (1 -> -> 1 `i `us `*uc ] +"107 +[; ;ds3231.c: 107: date = BCD_2_DEC(I2C_Master_Read(1)); +[e = _date -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"108 +[; ;ds3231.c: 108: month = BCD_2_DEC(I2C_Master_Read(1)); +[e = _month -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"109 +[; ;ds3231.c: 109: year = BCD_2_DEC(I2C_Master_Read(1)); +[e = _year -> ( _BCD_2_DEC (1 -> ( _I2C_Master_Read (1 -> -> 1 `i `us `i `ui ] +"110 +[; ;ds3231.c: 110: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"114 +[; ;ds3231.c: 114: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"115 +[; ;ds3231.c: 115: I2C_Master_Write(0xD1); +[e ( _I2C_Master_Write (1 -> -> 209 `i `ui ] +"116 +[; ;ds3231.c: 116: I2C_Master_Read(1); +[e ( _I2C_Master_Read (1 -> -> 1 `i `us ] +"117 +[; ;ds3231.c: 117: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"118 +[; ;ds3231.c: 118: } +[e :UE 102 ] +} +"120 +[; ;ds3231.c: 120: void Write_Alarms() { +[v _Write_Alarms `(v ~T0 @X0 1 ef ] +{ +[e :U _Write_Alarms ] +[f ] +"121 +[; ;ds3231.c: 121: I2C_Master_Start(); +[e ( _I2C_Master_Start .. ] +"122 +[; ;ds3231.c: 122: I2C_Master_Write(0xD0); +[e ( _I2C_Master_Write (1 -> -> 208 `i `ui ] +"123 +[; ;ds3231.c: 123: I2C_Master_Write(7); +[e ( _I2C_Master_Write (1 -> -> 7 `i `ui ] +"124 +[; ;ds3231.c: 124: I2C_Master_Write(0); +[e ( _I2C_Master_Write (1 -> -> 0 `i `ui ] +"125 +[; ;ds3231.c: 125: I2C_Master_Write(DEC_2_BCD(alarm1_min)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _alarm1_min `i `ui ] +"126 +[; ;ds3231.c: 126: I2C_Master_Write(DEC_2_BCD(alarm1_hour)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _alarm1_hour `i `ui ] +"127 +[; ;ds3231.c: 127: I2C_Master_Write(0x80); +[e ( _I2C_Master_Write (1 -> -> 128 `i `ui ] +"128 +[; ;ds3231.c: 128: I2C_Master_Write(DEC_2_BCD(alarm2_min)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _alarm2_min `i `ui ] +"129 +[; ;ds3231.c: 129: I2C_Master_Write(DEC_2_BCD(alarm2_hour)); +[e ( _I2C_Master_Write (1 -> ( _DEC_2_BCD (1 -> _alarm2_hour `i `ui ] +"130 +[; ;ds3231.c: 130: I2C_Master_Write(0x80); +[e ( _I2C_Master_Write (1 -> -> 128 `i `ui ] +"133 +[; ;ds3231.c: 133: I2C_Master_Write(4 | alarm1_status | (alarm2_status << 1)); +[e ( _I2C_Master_Write (1 | | -> -> 4 `i `ui _alarm1_status << _alarm2_status -> 1 `i ] +"134 +[; ;ds3231.c: 134: I2C_Master_Write(0); +[e ( _I2C_Master_Write (1 -> -> 0 `i `ui ] +"135 +[; ;ds3231.c: 135: I2C_Master_Stop(); +[e ( _I2C_Master_Stop .. ] +"136 +[; ;ds3231.c: 136: _delay((unsigned long)((200)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 200 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"137 +[; ;ds3231.c: 137: } +[e :UE 103 ] +} diff --git a/build/default/production/ds3231.p1.d b/build/default/production/ds3231.p1.d new file mode 100755 index 0000000..4046f39 --- /dev/null +++ b/build/default/production/ds3231.p1.d @@ -0,0 +1,6 @@ +build/default/production/ds3231.p1: \ +ds3231.c \ +ds3231.h \ +conf.h \ +i2c.h \ +main.h diff --git a/build/default/production/i2c.i b/build/default/production/i2c.i new file mode 100755 index 0000000..2920dec --- /dev/null +++ b/build/default/production/i2c.i @@ -0,0 +1,1807 @@ +# 1 "i2c.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "i2c.c" 2 + + + + +# 1 "./i2c.h" 1 +void I2C_Master_Init(const unsigned long); +void I2C_Master_Wait(void); +void I2C_Master_Start(void); +void I2C_Master_Repeated_Start(void); +void I2C_Master_Stop(void); +void I2C_Master_Write(unsigned); +unsigned short I2C_Master_Read(unsigned short); +# 5 "i2c.c" 2 + +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 6 "i2c.c" 2 + + +void I2C_Master_Init(const unsigned long freq_K) +{ + TRISC3 = 1; TRISC4 = 1; + + SSPCON = 0b00101000; + SSPCON2 = 0b00000000; + + SSPADD = (20000000/(4*freq_K*100))-1; + SSPSTAT = 0b00000000; +} + +void I2C_Master_Wait() +{ + while ( (SSPCON2 & 0b00011111) || (SSPSTAT & 0b00000100) ) ; +} + +void I2C_Master_Start() +{ + I2C_Master_Wait(); + SEN = 1; +} + +void I2C_Master_Repeated_Start() +{ + I2C_Master_Wait(); + RSEN = 1; +} + +void I2C_Master_Stop() +{ + I2C_Master_Wait(); + PEN = 1; +} + +void I2C_Master_Write(unsigned data) +{ + I2C_Master_Wait(); + SSPBUF = data; +} + +unsigned short I2C_Master_Read(unsigned short ack) +{ + unsigned short incoming; + I2C_Master_Wait(); + RCEN = 1; + + I2C_Master_Wait(); + incoming = SSPBUF; + + I2C_Master_Wait(); + ACKDT = (ack)?0:1; + ACKEN = 1; + + return incoming; +} diff --git a/build/default/production/i2c.p1 b/build/default/production/i2c.p1 new file mode 100755 index 0000000..7ae1e28 --- /dev/null +++ b/build/default/production/i2c.p1 @@ -0,0 +1,410 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2968 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2968: extern volatile __bit TRISC3 __attribute__((address(0x43B))); +[v _TRISC3 `Vb ~T0 @X0 0 e@1083 ] +"2971 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2971: extern volatile __bit TRISC4 __attribute__((address(0x43C))); +[v _TRISC4 `Vb ~T0 @X0 0 e@1084 ] +"815 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 815: extern volatile unsigned char SSPCON __attribute__((address(0x014))); +[v _SSPCON `Vuc ~T0 @X0 0 e@20 ] +"1754 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1754: extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); +[v _SSPCON2 `Vuc ~T0 @X0 0 e@145 ] +"1823 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1823: extern volatile unsigned char SSPADD __attribute__((address(0x093))); +[v _SSPADD `Vuc ~T0 @X0 0 e@147 ] +"1830 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1830: extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); +[v _SSPSTAT `Vuc ~T0 @X0 0 e@148 ] +"2806 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2806: extern volatile __bit SEN __attribute__((address(0x488))); +[v _SEN `Vb ~T0 @X0 0 e@1160 ] +"2791 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2791: extern volatile __bit RSEN __attribute__((address(0x489))); +[v _RSEN `Vb ~T0 @X0 0 e@1161 ] +"2632 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2632: extern volatile __bit PEN __attribute__((address(0x48A))); +[v _PEN `Vb ~T0 @X0 0 e@1162 ] +"808 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 808: extern volatile unsigned char SSPBUF __attribute__((address(0x013))); +[v _SSPBUF `Vuc ~T0 @X0 0 e@19 ] +"2737 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2737: extern volatile __bit RCEN __attribute__((address(0x48B))); +[v _RCEN `Vb ~T0 @X0 0 e@1163 ] +"2374 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2374: extern volatile __bit ACKDT __attribute__((address(0x48D))); +[v _ACKDT `Vb ~T0 @X0 0 e@1165 ] +"2377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2377: extern volatile __bit ACKEN __attribute__((address(0x48C))); +[v _ACKEN `Vb ~T0 @X0 0 e@1164 ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"8 i2c.c +[; ;i2c.c: 8: void I2C_Master_Init(const unsigned long freq_K) +[v _I2C_Master_Init `(v ~T0 @X0 1 ef1`Cul ] +"9 +[; ;i2c.c: 9: { +{ +[e :U _I2C_Master_Init ] +"8 +[; ;i2c.c: 8: void I2C_Master_Init(const unsigned long freq_K) +[v _freq_K `Cul ~T0 @X0 1 r1 ] +"9 +[; ;i2c.c: 9: { +[f ] +"10 +[; ;i2c.c: 10: TRISC3 = 1; TRISC4 = 1; +[e = _TRISC3 -> -> 1 `i `b ] +[e = _TRISC4 -> -> 1 `i `b ] +"12 +[; ;i2c.c: 12: SSPCON = 0b00101000; +[e = _SSPCON -> -> 40 `i `uc ] +"13 +[; ;i2c.c: 13: SSPCON2 = 0b00000000; +[e = _SSPCON2 -> -> 0 `i `uc ] +"15 +[; ;i2c.c: 15: SSPADD = (20000000/(4*freq_K*100))-1; +[e = _SSPADD -> - / -> -> 20000000 `l `ul * * -> -> -> 4 `i `l `ul _freq_K -> -> -> 100 `i `l `ul -> -> -> 1 `i `l `ul `uc ] +"16 +[; ;i2c.c: 16: SSPSTAT = 0b00000000; +[e = _SSPSTAT -> -> 0 `i `uc ] +"17 +[; ;i2c.c: 17: } +[e :UE 95 ] +} +"19 +[; ;i2c.c: 19: void I2C_Master_Wait() +[v _I2C_Master_Wait `(v ~T0 @X0 1 ef ] +"20 +[; ;i2c.c: 20: { +{ +[e :U _I2C_Master_Wait ] +[f ] +"21 +[; ;i2c.c: 21: while ( (SSPCON2 & 0b00011111) || (SSPSTAT & 0b00000100) ) ; +[e $U 97 ] +[e :U 98 ] +[e :U 97 ] +[e $ || != & -> _SSPCON2 `i -> 31 `i -> 0 `i != & -> _SSPSTAT `i -> 4 `i -> 0 `i 98 ] +[e :U 99 ] +"22 +[; ;i2c.c: 22: } +[e :UE 96 ] +} +"24 +[; ;i2c.c: 24: void I2C_Master_Start() +[v _I2C_Master_Start `(v ~T0 @X0 1 ef ] +"25 +[; ;i2c.c: 25: { +{ +[e :U _I2C_Master_Start ] +[f ] +"26 +[; ;i2c.c: 26: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"27 +[; ;i2c.c: 27: SEN = 1; +[e = _SEN -> -> 1 `i `b ] +"28 +[; ;i2c.c: 28: } +[e :UE 100 ] +} +"30 +[; ;i2c.c: 30: void I2C_Master_Repeated_Start() +[v _I2C_Master_Repeated_Start `(v ~T0 @X0 1 ef ] +"31 +[; ;i2c.c: 31: { +{ +[e :U _I2C_Master_Repeated_Start ] +[f ] +"32 +[; ;i2c.c: 32: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"33 +[; ;i2c.c: 33: RSEN = 1; +[e = _RSEN -> -> 1 `i `b ] +"34 +[; ;i2c.c: 34: } +[e :UE 101 ] +} +"36 +[; ;i2c.c: 36: void I2C_Master_Stop() +[v _I2C_Master_Stop `(v ~T0 @X0 1 ef ] +"37 +[; ;i2c.c: 37: { +{ +[e :U _I2C_Master_Stop ] +[f ] +"38 +[; ;i2c.c: 38: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"39 +[; ;i2c.c: 39: PEN = 1; +[e = _PEN -> -> 1 `i `b ] +"40 +[; ;i2c.c: 40: } +[e :UE 102 ] +} +"42 +[; ;i2c.c: 42: void I2C_Master_Write(unsigned data) +[v _I2C_Master_Write `(v ~T0 @X0 1 ef1`ui ] +"43 +[; ;i2c.c: 43: { +{ +[e :U _I2C_Master_Write ] +"42 +[; ;i2c.c: 42: void I2C_Master_Write(unsigned data) +[v _data `ui ~T0 @X0 1 r1 ] +"43 +[; ;i2c.c: 43: { +[f ] +"44 +[; ;i2c.c: 44: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"45 +[; ;i2c.c: 45: SSPBUF = data; +[e = _SSPBUF -> _data `uc ] +"46 +[; ;i2c.c: 46: } +[e :UE 103 ] +} +"48 +[; ;i2c.c: 48: unsigned short I2C_Master_Read(unsigned short ack) +[v _I2C_Master_Read `(us ~T0 @X0 1 ef1`us ] +"49 +[; ;i2c.c: 49: { +{ +[e :U _I2C_Master_Read ] +"48 +[; ;i2c.c: 48: unsigned short I2C_Master_Read(unsigned short ack) +[v _ack `us ~T0 @X0 1 r1 ] +"49 +[; ;i2c.c: 49: { +[f ] +"50 +[; ;i2c.c: 50: unsigned short incoming; +[v _incoming `us ~T0 @X0 1 a ] +"51 +[; ;i2c.c: 51: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"52 +[; ;i2c.c: 52: RCEN = 1; +[e = _RCEN -> -> 1 `i `b ] +"54 +[; ;i2c.c: 54: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"55 +[; ;i2c.c: 55: incoming = SSPBUF; +[e = _incoming -> _SSPBUF `us ] +"57 +[; ;i2c.c: 57: I2C_Master_Wait(); +[e ( _I2C_Master_Wait .. ] +"58 +[; ;i2c.c: 58: ACKDT = (ack)?0:1; +[e = _ACKDT -> ? != -> _ack `ui -> -> 0 `i `ui : -> 0 `i -> 1 `i `b ] +"59 +[; ;i2c.c: 59: ACKEN = 1; +[e = _ACKEN -> -> 1 `i `b ] +"61 +[; ;i2c.c: 61: return incoming; +[e ) _incoming ] +[e $UE 104 ] +"62 +[; ;i2c.c: 62: } +[e :UE 104 ] +} diff --git a/build/default/production/i2c.p1.d b/build/default/production/i2c.p1.d new file mode 100755 index 0000000..1883ca7 --- /dev/null +++ b/build/default/production/i2c.p1.d @@ -0,0 +1,4 @@ +build/default/production/i2c.p1: \ +i2c.c \ +i2c.h \ +conf.h diff --git a/build/default/production/lcd.i b/build/default/production/lcd.i new file mode 100755 index 0000000..370b6b7 --- /dev/null +++ b/build/default/production/lcd.i @@ -0,0 +1,1860 @@ +# 1 "lcd.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "lcd.c" 2 +# 1 "./lcd.h" 1 +void Lcd_Port(char); +void Lcd_Cmd(char); +void Lcd_Clear(); +void Lcd_Set_Cursor(char, char); +void Lcd_Init(); +void Lcd_Write_Char(char); +void Lcd_Write_String(char *); +void Lcd_Shift_Right(); +void Lcd_Shift_Left(); + + +void Vfd_Set_Brightness(int); +# 1 "lcd.c" 2 + +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 2 "lcd.c" 2 + + + + +void Lcd_Port(char a) { + if (a & 1) + RD4 = 1; + else + RD4 = 0; + + if (a & 2) + RD5 = 1; + else + RD5 = 0; + + if (a & 4) + RD6 = 1; + else + RD6 = 0; + + if (a & 8) + RD7 = 1; + else + RD7 = 0; +} + +void Lcd_Cmd(char a) { + RD2 = 0; + Lcd_Port(a); + RD3 = 1; + _delay((unsigned long)((4)*(20000000/4000.0))); + RD3 = 0; +} + +void Lcd_Clear() { + Lcd_Cmd(0); + Lcd_Cmd(1); +} + +void Lcd_Set_Cursor(char a, char b) { + char temp, z, y; + if (a == 1) { + temp = 0x80 + b - 1; + z = temp >> 4; + y = temp & 0x0F; + Lcd_Cmd(z); + Lcd_Cmd(y); + } else if (a == 2) { + temp = 0xC0 + b - 1; + z = temp >> 4; + y = temp & 0x0F; + Lcd_Cmd(z); + Lcd_Cmd(y); + } +} + +void Lcd_Init() { + Lcd_Port(0x00); + _delay((unsigned long)((20)*(20000000/4000.0))); + Lcd_Cmd(0x03); + _delay((unsigned long)((5)*(20000000/4000.0))); + Lcd_Cmd(0x03); + _delay((unsigned long)((11)*(20000000/4000.0))); + Lcd_Cmd(0x03); + + Lcd_Cmd(0x02); + Lcd_Cmd(0x02); + Lcd_Cmd(0x08); + Lcd_Cmd(0x00); + Lcd_Cmd(0x0C); + Lcd_Cmd(0x00); + Lcd_Cmd(0x06); +} + +void Lcd_Write_Char(char a) { + char temp, y; + temp = a & 0x0F; + y = a & 0xF0; + RD2 = 1; + Lcd_Port(y >> 4); + RD3 = 1; + _delay((unsigned long)((40)*(20000000/4000000.0))); + RD3 = 0; + Lcd_Port(temp); + RD3 = 1; + _delay((unsigned long)((40)*(20000000/4000000.0))); + RD3 = 0; +} + +void Lcd_Write_String(char *a) { + int i; + for (i = 0; a[i] != '\0'; i++) + Lcd_Write_Char(a[i]); +} + +void Lcd_Shift_Right() { + Lcd_Cmd(0x01); + Lcd_Cmd(0x0C); +} + +void Lcd_Shift_Left() { + Lcd_Cmd(0x01); + Lcd_Cmd(0x08); +} + + +void Vfd_Set_Brightness(int level) { + +} diff --git a/build/default/production/lcd.p1 b/build/default/production/lcd.p1 new file mode 100755 index 0000000..cd257aa --- /dev/null +++ b/build/default/production/lcd.p1 @@ -0,0 +1,562 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2761 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2761: extern volatile __bit RD4 __attribute__((address(0x44))); +[v _RD4 `Vb ~T0 @X0 0 e@68 ] +"2764 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2764: extern volatile __bit RD5 __attribute__((address(0x45))); +[v _RD5 `Vb ~T0 @X0 0 e@69 ] +"2767 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2767: extern volatile __bit RD6 __attribute__((address(0x46))); +[v _RD6 `Vb ~T0 @X0 0 e@70 ] +"2770 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2770: extern volatile __bit RD7 __attribute__((address(0x47))); +[v _RD7 `Vb ~T0 @X0 0 e@71 ] +"2755 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2755: extern volatile __bit RD2 __attribute__((address(0x42))); +[v _RD2 `Vb ~T0 @X0 0 e@66 ] +"2758 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2758: extern volatile __bit RD3 __attribute__((address(0x43))); +[v _RD3 `Vb ~T0 @X0 0 e@67 ] +[v F859 `(v ~T0 @X0 1 tf1`ul ] +"92 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic.h +[v __delay `JF859 ~T0 @X0 0 e ] +[p i __delay ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"6 lcd.c +[; ;lcd.c: 6: void Lcd_Port(char a) { +[v _Lcd_Port `(v ~T0 @X0 1 ef1`uc ] +{ +[e :U _Lcd_Port ] +[v _a `uc ~T0 @X0 1 r1 ] +[f ] +"7 +[; ;lcd.c: 7: if (a & 1) +[e $ ! != & -> _a `i -> 1 `i -> 0 `i 96 ] +"8 +[; ;lcd.c: 8: RD4 = 1; +[e = _RD4 -> -> 1 `i `b ] +[e $U 97 ] +"9 +[; ;lcd.c: 9: else +[e :U 96 ] +"10 +[; ;lcd.c: 10: RD4 = 0; +[e = _RD4 -> -> 0 `i `b ] +[e :U 97 ] +"12 +[; ;lcd.c: 12: if (a & 2) +[e $ ! != & -> _a `i -> 2 `i -> 0 `i 98 ] +"13 +[; ;lcd.c: 13: RD5 = 1; +[e = _RD5 -> -> 1 `i `b ] +[e $U 99 ] +"14 +[; ;lcd.c: 14: else +[e :U 98 ] +"15 +[; ;lcd.c: 15: RD5 = 0; +[e = _RD5 -> -> 0 `i `b ] +[e :U 99 ] +"17 +[; ;lcd.c: 17: if (a & 4) +[e $ ! != & -> _a `i -> 4 `i -> 0 `i 100 ] +"18 +[; ;lcd.c: 18: RD6 = 1; +[e = _RD6 -> -> 1 `i `b ] +[e $U 101 ] +"19 +[; ;lcd.c: 19: else +[e :U 100 ] +"20 +[; ;lcd.c: 20: RD6 = 0; +[e = _RD6 -> -> 0 `i `b ] +[e :U 101 ] +"22 +[; ;lcd.c: 22: if (a & 8) +[e $ ! != & -> _a `i -> 8 `i -> 0 `i 102 ] +"23 +[; ;lcd.c: 23: RD7 = 1; +[e = _RD7 -> -> 1 `i `b ] +[e $U 103 ] +"24 +[; ;lcd.c: 24: else +[e :U 102 ] +"25 +[; ;lcd.c: 25: RD7 = 0; +[e = _RD7 -> -> 0 `i `b ] +[e :U 103 ] +"26 +[; ;lcd.c: 26: } +[e :UE 95 ] +} +"28 +[; ;lcd.c: 28: void Lcd_Cmd(char a) { +[v _Lcd_Cmd `(v ~T0 @X0 1 ef1`uc ] +{ +[e :U _Lcd_Cmd ] +[v _a `uc ~T0 @X0 1 r1 ] +[f ] +"29 +[; ;lcd.c: 29: RD2 = 0; +[e = _RD2 -> -> 0 `i `b ] +"30 +[; ;lcd.c: 30: Lcd_Port(a); +[e ( _Lcd_Port (1 _a ] +"31 +[; ;lcd.c: 31: RD3 = 1; +[e = _RD3 -> -> 1 `i `b ] +"32 +[; ;lcd.c: 32: _delay((unsigned long)((4)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 4 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"33 +[; ;lcd.c: 33: RD3 = 0; +[e = _RD3 -> -> 0 `i `b ] +"34 +[; ;lcd.c: 34: } +[e :UE 104 ] +} +"36 +[; ;lcd.c: 36: void Lcd_Clear() { +[v _Lcd_Clear `(v ~T0 @X0 1 ef ] +{ +[e :U _Lcd_Clear ] +[f ] +"37 +[; ;lcd.c: 37: Lcd_Cmd(0); +[e ( _Lcd_Cmd (1 -> -> 0 `i `uc ] +"38 +[; ;lcd.c: 38: Lcd_Cmd(1); +[e ( _Lcd_Cmd (1 -> -> 1 `i `uc ] +"39 +[; ;lcd.c: 39: } +[e :UE 105 ] +} +"41 +[; ;lcd.c: 41: void Lcd_Set_Cursor(char a, char b) { +[v _Lcd_Set_Cursor `(v ~T0 @X0 1 ef2`uc`uc ] +{ +[e :U _Lcd_Set_Cursor ] +[v _a `uc ~T0 @X0 1 r1 ] +[v _b `uc ~T0 @X0 1 r2 ] +[f ] +"42 +[; ;lcd.c: 42: char temp, z, y; +[v _temp `uc ~T0 @X0 1 a ] +[v _z `uc ~T0 @X0 1 a ] +[v _y `uc ~T0 @X0 1 a ] +"43 +[; ;lcd.c: 43: if (a == 1) { +[e $ ! == -> _a `i -> 1 `i 107 ] +{ +"44 +[; ;lcd.c: 44: temp = 0x80 + b - 1; +[e = _temp -> - + -> 128 `i -> _b `i -> 1 `i `uc ] +"45 +[; ;lcd.c: 45: z = temp >> 4; +[e = _z -> >> -> _temp `i -> 4 `i `uc ] +"46 +[; ;lcd.c: 46: y = temp & 0x0F; +[e = _y -> & -> _temp `i -> 15 `i `uc ] +"47 +[; ;lcd.c: 47: Lcd_Cmd(z); +[e ( _Lcd_Cmd (1 _z ] +"48 +[; ;lcd.c: 48: Lcd_Cmd(y); +[e ( _Lcd_Cmd (1 _y ] +"49 +[; ;lcd.c: 49: } else if (a == 2) { +} +[e $U 108 ] +[e :U 107 ] +[e $ ! == -> _a `i -> 2 `i 109 ] +{ +"50 +[; ;lcd.c: 50: temp = 0xC0 + b - 1; +[e = _temp -> - + -> 192 `i -> _b `i -> 1 `i `uc ] +"51 +[; ;lcd.c: 51: z = temp >> 4; +[e = _z -> >> -> _temp `i -> 4 `i `uc ] +"52 +[; ;lcd.c: 52: y = temp & 0x0F; +[e = _y -> & -> _temp `i -> 15 `i `uc ] +"53 +[; ;lcd.c: 53: Lcd_Cmd(z); +[e ( _Lcd_Cmd (1 _z ] +"54 +[; ;lcd.c: 54: Lcd_Cmd(y); +[e ( _Lcd_Cmd (1 _y ] +"55 +[; ;lcd.c: 55: } +} +[e :U 109 ] +[e :U 108 ] +"56 +[; ;lcd.c: 56: } +[e :UE 106 ] +} +"58 +[; ;lcd.c: 58: void Lcd_Init() { +[v _Lcd_Init `(v ~T0 @X0 1 ef ] +{ +[e :U _Lcd_Init ] +[f ] +"59 +[; ;lcd.c: 59: Lcd_Port(0x00); +[e ( _Lcd_Port (1 -> -> 0 `i `uc ] +"60 +[; ;lcd.c: 60: _delay((unsigned long)((20)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 20 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"61 +[; ;lcd.c: 61: Lcd_Cmd(0x03); +[e ( _Lcd_Cmd (1 -> -> 3 `i `uc ] +"62 +[; ;lcd.c: 62: _delay((unsigned long)((5)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 5 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"63 +[; ;lcd.c: 63: Lcd_Cmd(0x03); +[e ( _Lcd_Cmd (1 -> -> 3 `i `uc ] +"64 +[; ;lcd.c: 64: _delay((unsigned long)((11)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 11 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"65 +[; ;lcd.c: 65: Lcd_Cmd(0x03); +[e ( _Lcd_Cmd (1 -> -> 3 `i `uc ] +"67 +[; ;lcd.c: 67: Lcd_Cmd(0x02); +[e ( _Lcd_Cmd (1 -> -> 2 `i `uc ] +"68 +[; ;lcd.c: 68: Lcd_Cmd(0x02); +[e ( _Lcd_Cmd (1 -> -> 2 `i `uc ] +"69 +[; ;lcd.c: 69: Lcd_Cmd(0x08); +[e ( _Lcd_Cmd (1 -> -> 8 `i `uc ] +"70 +[; ;lcd.c: 70: Lcd_Cmd(0x00); +[e ( _Lcd_Cmd (1 -> -> 0 `i `uc ] +"71 +[; ;lcd.c: 71: Lcd_Cmd(0x0C); +[e ( _Lcd_Cmd (1 -> -> 12 `i `uc ] +"72 +[; ;lcd.c: 72: Lcd_Cmd(0x00); +[e ( _Lcd_Cmd (1 -> -> 0 `i `uc ] +"73 +[; ;lcd.c: 73: Lcd_Cmd(0x06); +[e ( _Lcd_Cmd (1 -> -> 6 `i `uc ] +"74 +[; ;lcd.c: 74: } +[e :UE 110 ] +} +"76 +[; ;lcd.c: 76: void Lcd_Write_Char(char a) { +[v _Lcd_Write_Char `(v ~T0 @X0 1 ef1`uc ] +{ +[e :U _Lcd_Write_Char ] +[v _a `uc ~T0 @X0 1 r1 ] +[f ] +"77 +[; ;lcd.c: 77: char temp, y; +[v _temp `uc ~T0 @X0 1 a ] +[v _y `uc ~T0 @X0 1 a ] +"78 +[; ;lcd.c: 78: temp = a & 0x0F; +[e = _temp -> & -> _a `i -> 15 `i `uc ] +"79 +[; ;lcd.c: 79: y = a & 0xF0; +[e = _y -> & -> _a `i -> 240 `i `uc ] +"80 +[; ;lcd.c: 80: RD2 = 1; +[e = _RD2 -> -> 1 `i `b ] +"81 +[; ;lcd.c: 81: Lcd_Port(y >> 4); +[e ( _Lcd_Port (1 -> >> -> _y `i -> 4 `i `uc ] +"82 +[; ;lcd.c: 82: RD3 = 1; +[e = _RD3 -> -> 1 `i `b ] +"83 +[; ;lcd.c: 83: _delay((unsigned long)((40)*(20000000/4000000.0))); +[e ( __delay (1 -> * -> -> 40 `i `d / -> -> 20000000 `l `d .4000000.0 `ul ] +"84 +[; ;lcd.c: 84: RD3 = 0; +[e = _RD3 -> -> 0 `i `b ] +"85 +[; ;lcd.c: 85: Lcd_Port(temp); +[e ( _Lcd_Port (1 _temp ] +"86 +[; ;lcd.c: 86: RD3 = 1; +[e = _RD3 -> -> 1 `i `b ] +"87 +[; ;lcd.c: 87: _delay((unsigned long)((40)*(20000000/4000000.0))); +[e ( __delay (1 -> * -> -> 40 `i `d / -> -> 20000000 `l `d .4000000.0 `ul ] +"88 +[; ;lcd.c: 88: RD3 = 0; +[e = _RD3 -> -> 0 `i `b ] +"89 +[; ;lcd.c: 89: } +[e :UE 111 ] +} +"91 +[; ;lcd.c: 91: void Lcd_Write_String(char *a) { +[v _Lcd_Write_String `(v ~T0 @X0 1 ef1`*uc ] +{ +[e :U _Lcd_Write_String ] +[v _a `*uc ~T0 @X0 1 r1 ] +[f ] +"92 +[; ;lcd.c: 92: int i; +[v _i `i ~T0 @X0 1 a ] +"93 +[; ;lcd.c: 93: for (i = 0; a[i] != '\0'; i++) +{ +[e = _i -> 0 `i ] +[e $U 116 ] +[e :U 113 ] +"94 +[; ;lcd.c: 94: Lcd_Write_Char(a[i]); +[e ( _Lcd_Write_Char (1 *U + _a * -> _i `x -> -> # *U _a `i `x ] +[e ++ _i -> 1 `i ] +[e :U 116 ] +[e $ != -> *U + _a * -> _i `x -> -> # *U _a `i `x `ui -> 0 `ui 113 ] +[e :U 114 ] +} +"95 +[; ;lcd.c: 95: } +[e :UE 112 ] +} +"97 +[; ;lcd.c: 97: void Lcd_Shift_Right() { +[v _Lcd_Shift_Right `(v ~T0 @X0 1 ef ] +{ +[e :U _Lcd_Shift_Right ] +[f ] +"98 +[; ;lcd.c: 98: Lcd_Cmd(0x01); +[e ( _Lcd_Cmd (1 -> -> 1 `i `uc ] +"99 +[; ;lcd.c: 99: Lcd_Cmd(0x0C); +[e ( _Lcd_Cmd (1 -> -> 12 `i `uc ] +"100 +[; ;lcd.c: 100: } +[e :UE 117 ] +} +"102 +[; ;lcd.c: 102: void Lcd_Shift_Left() { +[v _Lcd_Shift_Left `(v ~T0 @X0 1 ef ] +{ +[e :U _Lcd_Shift_Left ] +[f ] +"103 +[; ;lcd.c: 103: Lcd_Cmd(0x01); +[e ( _Lcd_Cmd (1 -> -> 1 `i `uc ] +"104 +[; ;lcd.c: 104: Lcd_Cmd(0x08); +[e ( _Lcd_Cmd (1 -> -> 8 `i `uc ] +"105 +[; ;lcd.c: 105: } +[e :UE 118 ] +} +"108 +[; ;lcd.c: 108: void Vfd_Set_Brightness(int level) { +[v _Vfd_Set_Brightness `(v ~T0 @X0 1 ef1`i ] +{ +[e :U _Vfd_Set_Brightness ] +[v _level `i ~T0 @X0 1 r1 ] +[f ] +"110 +[; ;lcd.c: 110: } +[e :UE 119 ] +} diff --git a/build/default/production/lcd.p1.d b/build/default/production/lcd.p1.d new file mode 100755 index 0000000..bfda697 --- /dev/null +++ b/build/default/production/lcd.p1.d @@ -0,0 +1,4 @@ +build/default/production/lcd.p1: \ +lcd.c \ +lcd.h \ +conf.h diff --git a/build/default/production/main.i b/build/default/production/main.i new file mode 100755 index 0000000..94710f3 --- /dev/null +++ b/build/default/production/main.i @@ -0,0 +1,2212 @@ +# 1 "main.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "main.c" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__size_t.h" 1 3 + + + +typedef unsigned size_t; +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 2 3 + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__null.h" 1 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 2 3 + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdarg.h" 1 3 + + + + + + +typedef void * va_list[1]; + +#pragma intrinsic(__va_start) +extern void * __va_start(void); + +#pragma intrinsic(__va_arg) +extern void * __va_arg(void *, ...); +# 11 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 2 3 +# 43 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 3 +struct __prbuf +{ + char * ptr; + void (* func)(char); +}; +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\conio.h" 1 3 + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\errno.h" 1 3 +# 29 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\errno.h" 3 +extern int errno; +# 8 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\conio.h" 2 3 + + + + +extern void init_uart(void); + +extern char getch(void); +extern char getche(void); +extern void putch(char); +extern void ungetch(char); + +extern __bit kbhit(void); + + + +extern char * cgets(char *); +extern void cputs(const char *); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 2 3 + + + +extern int cprintf(char *, ...); +#pragma printf_check(cprintf) + + + +extern int _doprnt(struct __prbuf *, const register char *, register va_list); +# 180 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\stdio.h" 3 +#pragma printf_check(vprintf) const +#pragma printf_check(vsprintf) const + +extern char * gets(char *); +extern int puts(const char *); +extern int scanf(const char *, ...) __attribute__((unsupported("scanf() is not supported by this compiler"))); +extern int sscanf(const char *, const char *, ...) __attribute__((unsupported("sscanf() is not supported by this compiler"))); +extern int vprintf(const char *, va_list) __attribute__((unsupported("vprintf() is not supported by this compiler"))); +extern int vsprintf(char *, const char *, va_list) __attribute__((unsupported("vsprintf() is not supported by this compiler"))); +extern int vscanf(const char *, va_list ap) __attribute__((unsupported("vscanf() is not supported by this compiler"))); +extern int vsscanf(const char *, const char *, va_list) __attribute__((unsupported("vsscanf() is not supported by this compiler"))); + +#pragma printf_check(printf) const +#pragma printf_check(sprintf) const +extern int sprintf(char *, const char *, ...); +extern int printf(const char *, ...); +# 1 "main.c" 2 + + + + +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 5 "main.c" 2 + +# 1 "./main.h" 1 + +unsigned int sec = 30; +unsigned int min = 42; +unsigned int hour = 21; +unsigned int dayofweek = 7; +unsigned int date = 27; +unsigned int month = 7; +unsigned int year = 19; +unsigned int century = 20; +unsigned int alarm1_sec, alarm1_min, alarm1_hour; +unsigned int alarm2_min, alarm2_hour; +unsigned int status_reg, alarm1_status, alarm2_status; +unsigned int control_reg; + + +unsigned int temperature_lsb = 0; +int temperature_msb = 0; +unsigned char temp_sign = ' '; + + +char* weekday; + + +unsigned int sec_chg = 0; + + +unsigned char sec_0, sec_1; +unsigned char min_0, min_1; +unsigned char hour_0, hour_1; +unsigned char day_0, day_1; +unsigned char month_0, month_1; +unsigned char year_0, year_1; +unsigned char temp_0, temp_1, temp_2; +unsigned char alarm1_sec_0, alarm1_sec_1, alarm1_min_0, alarm1_min_1, + alarm1_hour_0, alarm1_hour_1; +unsigned char alarm2_min_0, alarm2_min_1, alarm2_hour_0, alarm2_hour_1; + + +char buf[40]; + + +void format_DateTimeChars(void); + + +void format_Temperature(void); + + +void getWeekDay(unsigned int); + + +void Get_Alarm_Status(void); + +void display_Intro(void); +void display_Lcd_Layout(void); + +void update_Display(void); +# 6 "main.c" 2 + +# 1 "./lcd.h" 1 +void Lcd_Port(char); +void Lcd_Cmd(char); +void Lcd_Clear(); +void Lcd_Set_Cursor(char, char); +void Lcd_Init(); +void Lcd_Write_Char(char); +void Lcd_Write_String(char *); +void Lcd_Shift_Right(); +void Lcd_Shift_Left(); + + +void Vfd_Set_Brightness(int); +# 7 "main.c" 2 + +# 1 "./i2c.h" 1 +void I2C_Master_Init(const unsigned long); +void I2C_Master_Wait(void); +void I2C_Master_Start(void); +void I2C_Master_Repeated_Start(void); +void I2C_Master_Stop(void); +void I2C_Master_Write(unsigned); +unsigned short I2C_Master_Read(unsigned short); +# 8 "main.c" 2 + +# 1 "./ds3231.h" 1 +# 1 "./conf.h" 1 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 1 "./ds3231.h" 2 + + +int BCD_2_DEC(int); +int DEC_2_BCD(int); +void Read_Alarms_Temp(void); +void Set_Date(void); +void Set_DayOfWeek(void); +void Set_Time(void); +void Set_Time_Date(void); +void Update_Current_Date_Time(void); +void Write_Alarms(void); +# 9 "main.c" 2 + +# 1 "./beep.h" 1 +# 1 "./conf.h" 1 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 1 "./beep.h" 2 + + +void alarm(unsigned int); +# 10 "main.c" 2 + + + + + + + +int main() { + TRISC = 0x00; + PORTC = 0x00; + + TRISD = 0x00; + PORTD = 0x00; +# 33 "main.c" + I2C_Master_Init(100000); + + + + + + + + Lcd_Init(); + + + + + + + + display_Intro(); + display_Lcd_Layout(); +# 68 "main.c" + while (1) { + + + + Update_Current_Date_Time(); + + + + Read_Alarms_Temp(); + + + Get_Alarm_Status(); + + + + format_DateTimeChars(); + + + + format_Temperature(); + + + + getWeekDay(dayofweek); + + + if (sec_chg != sec) { + + update_Display(); + + + sec_chg = sec; +# 121 "main.c" + } + } + + return 0; +} + + + +void format_DateTimeChars() { + sec_0 = sec % 10 + '0'; + sec_1 = sec / 10 + '0'; + min_0 = min % 10 + '0'; + min_1 = min / 10 + '0'; + hour_0 = hour % 10 + '0'; + hour_1 = hour / 10 + '0'; + day_0 = date % 10 + '0'; + day_1 = date / 10 + '0'; + month_0 = month % 10 + '0'; + month_1 = month / 10 + '0'; + year_0 = year % 10 + '0'; + year_1 = year / 10 + '0'; + alarm1_sec_0 = alarm1_sec % 10 + '0'; + alarm1_sec_1 = alarm1_sec / 10 + '0'; + alarm1_min_0 = alarm1_min % 10 + '0'; + alarm1_min_1 = alarm1_min / 10 + '0'; + alarm1_hour_0 = alarm1_hour % 10 + '0'; + alarm1_hour_1 = alarm1_hour / 10 + '0'; + alarm2_min_0 = alarm2_min % 10 + '0'; + alarm2_min_1 = alarm2_min / 10 + '0'; + alarm2_hour_0 = alarm2_hour % 10 + '0'; + alarm2_hour_1 = alarm2_hour / 10 + '0'; +} + + + +void format_Temperature() { + + if (temperature_msb < 0) { + temperature_msb *= -1; + temp_sign = '-'; + } else { + temp_sign = '+'; + } + + + temperature_lsb >>= 6; + + + temperature_lsb *= 25; + + if (temperature_lsb == 0) { + temp_0 = '0'; + } + + if (temperature_lsb == 25) { + temp_0 = '2'; + } + + if (temperature_lsb == 50) { + temp_0 = '5'; + } + + if (temperature_lsb == 75) { + temp_0 = '7'; + } + + temp_1 = temperature_msb % 10 + '0'; + temp_2 = temperature_msb / 10 + '0'; +} + + + +void getWeekDay(unsigned int dayofweek) { + switch (dayofweek) { + case 1: + weekday = "Sun"; + break; + case 2: + weekday = "Mon"; + break; + case 3: + weekday = "Tue"; + break; + case 4: + weekday = "Wed"; + break; + case 5: + weekday = "Thu"; + break; + case 6: + weekday = "Fri"; + break; + case 7: + weekday = "Sat"; + break; + } +} + + + +void Get_Alarm_Status() { + alarm1_status = control_reg & 0x01; + alarm2_status = (control_reg >> 1) & 0x01; +} + +void display_Intro() { + + Lcd_Clear(); + Lcd_Set_Cursor(1, 1); + Lcd_Write_String("RTC/LCD with PIC"); + Lcd_Set_Cursor(2, 1); + Lcd_Write_String(" Circuit Digest"); + _delay((unsigned long)((2000)*(20000000/4000.0))); +} + +void display_Lcd_Layout() { + + Lcd_Clear(); + Lcd_Set_Cursor(1, 1); + Lcd_Write_String("HH:mm:ss -PP.P"); + Lcd_Write_Char(0xDF); + Lcd_Write_Char('C'); + Lcd_Set_Cursor(2, 1); + Lcd_Write_String("ddd, DD/MM/YY "); + _delay((unsigned long)((2000)*(20000000/4000.0))); +} + +void update_Display() { + + Lcd_Set_Cursor(1, 1); + Lcd_Write_Char(hour_1); + Lcd_Write_Char(hour_0); + + + Lcd_Set_Cursor(1, 4); + Lcd_Write_Char(min_1); + Lcd_Write_Char(min_0); + + + Lcd_Set_Cursor(1, 7); + Lcd_Write_Char(sec_1); + Lcd_Write_Char(sec_0); + + + Lcd_Set_Cursor(2, 6); + Lcd_Write_Char(day_1); + Lcd_Write_Char(day_0); + + + Lcd_Set_Cursor(2, 9); + Lcd_Write_Char(month_1); + Lcd_Write_Char(month_0); + + + Lcd_Set_Cursor(2, 12); + Lcd_Write_Char(year_1); + Lcd_Write_Char(year_0); + + + Lcd_Set_Cursor(2, 1); + Lcd_Write_String(weekday); + + + Lcd_Set_Cursor(1, 10); + Lcd_Write_Char(temp_sign); + Lcd_Write_Char(temp_2); + Lcd_Write_Char(temp_1); + Lcd_Set_Cursor(1, 14); + Lcd_Write_Char(temp_0); + + if (min == 00 && sec == 00) { + alarm(2); + } + + if (min == 30 && sec == 00) { + alarm(1); + } +} diff --git a/build/default/production/main.p1 b/build/default/production/main.p1 new file mode 100755 index 0000000..cf2668c --- /dev/null +++ b/build/default/production/main.p1 @@ -0,0 +1,971 @@ +Version 4.0 HI-TECH Software Intermediate Code +[p mainexit ] +"1437 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1437: extern volatile unsigned char TRISC __attribute__((address(0x087))); +[v _TRISC `Vuc ~T0 @X0 0 e@135 ] +"278 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 278: extern volatile unsigned char PORTC __attribute__((address(0x007))); +[v _PORTC `Vuc ~T0 @X0 0 e@7 ] +"1499 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1499: extern volatile unsigned char TRISD __attribute__((address(0x088))); +[v _TRISD `Vuc ~T0 @X0 0 e@136 ] +"340 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 340: extern volatile unsigned char PORTD __attribute__((address(0x008))); +[v _PORTD `Vuc ~T0 @X0 0 e@8 ] +"1 ./i2c.h +[; ;./i2c.h: 1: void I2C_Master_Init(const unsigned long); +[v _I2C_Master_Init `(v ~T0 @X0 0 ef1`Cul ] +"5 ./lcd.h +[; ;./lcd.h: 5: void Lcd_Init(); +[v _Lcd_Init `(v ~T0 @X0 0 e? ] +"53 ./main.h +[; ;./main.h: 53: void display_Intro(void); +[v _display_Intro `(v ~T0 @X0 0 ef ] +"54 +[; ;./main.h: 54: void display_Lcd_Layout(void); +[v _display_Lcd_Layout `(v ~T0 @X0 0 ef ] +"10 ./ds3231.h +[; ;./ds3231.h: 10: void Update_Current_Date_Time(void); +[v _Update_Current_Date_Time `(v ~T0 @X0 0 ef ] +"5 +[; ;./ds3231.h: 5: void Read_Alarms_Temp(void); +[v _Read_Alarms_Temp `(v ~T0 @X0 0 ef ] +"51 ./main.h +[; ;./main.h: 51: void Get_Alarm_Status(void); +[v _Get_Alarm_Status `(v ~T0 @X0 0 ef ] +"42 +[; ;./main.h: 42: void format_DateTimeChars(void); +[v _format_DateTimeChars `(v ~T0 @X0 0 ef ] +"45 +[; ;./main.h: 45: void format_Temperature(void); +[v _format_Temperature `(v ~T0 @X0 0 ef ] +"48 +[; ;./main.h: 48: void getWeekDay(unsigned int); +[v _getWeekDay `(v ~T0 @X0 0 ef1`ui ] +"56 +[; ;./main.h: 56: void update_Display(void); +[v _update_Display `(v ~T0 @X0 0 ef ] +"3 ./lcd.h +[; ;./lcd.h: 3: void Lcd_Clear(); +[v _Lcd_Clear `(v ~T0 @X0 0 e? ] +"4 +[; ;./lcd.h: 4: void Lcd_Set_Cursor(char, char); +[v _Lcd_Set_Cursor `(v ~T0 @X0 0 ef2`uc`uc ] +"7 +[; ;./lcd.h: 7: void Lcd_Write_String(char *); +[v _Lcd_Write_String `(v ~T0 @X0 0 ef1`*uc ] +[v F899 `(v ~T0 @X0 1 tf1`ul ] +"92 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic.h +[v __delay `JF899 ~T0 @X0 0 e ] +[p i __delay ] +"6 ./lcd.h +[; ;./lcd.h: 6: void Lcd_Write_Char(char); +[v _Lcd_Write_Char `(v ~T0 @X0 0 ef1`uc ] +"3 ./beep.h +[; ;./beep.h: 3: void alarm(unsigned int); +[v _alarm `(v ~T0 @X0 0 ef1`ui ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"2 ./main.h +[; ;./main.h: 2: unsigned int sec = 30; +[v _sec `ui ~T0 @X0 1 e ] +[i _sec +-> -> 30 `i `ui +] +"3 +[; ;./main.h: 3: unsigned int min = 42; +[v _min `ui ~T0 @X0 1 e ] +[i _min +-> -> 42 `i `ui +] +"4 +[; ;./main.h: 4: unsigned int hour = 21; +[v _hour `ui ~T0 @X0 1 e ] +[i _hour +-> -> 21 `i `ui +] +"5 +[; ;./main.h: 5: unsigned int dayofweek = 7; +[v _dayofweek `ui ~T0 @X0 1 e ] +[i _dayofweek +-> -> 7 `i `ui +] +"6 +[; ;./main.h: 6: unsigned int date = 27; +[v _date `ui ~T0 @X0 1 e ] +[i _date +-> -> 27 `i `ui +] +"7 +[; ;./main.h: 7: unsigned int month = 7; +[v _month `ui ~T0 @X0 1 e ] +[i _month +-> -> 7 `i `ui +] +"8 +[; ;./main.h: 8: unsigned int year = 19; +[v _year `ui ~T0 @X0 1 e ] +[i _year +-> -> 19 `i `ui +] +"9 +[; ;./main.h: 9: unsigned int century = 20; +[v _century `ui ~T0 @X0 1 e ] +[i _century +-> -> 20 `i `ui +] +"10 +[; ;./main.h: 10: unsigned int alarm1_sec, alarm1_min, alarm1_hour; +[v _alarm1_sec `ui ~T0 @X0 1 e ] +[v _alarm1_min `ui ~T0 @X0 1 e ] +[v _alarm1_hour `ui ~T0 @X0 1 e ] +"11 +[; ;./main.h: 11: unsigned int alarm2_min, alarm2_hour; +[v _alarm2_min `ui ~T0 @X0 1 e ] +[v _alarm2_hour `ui ~T0 @X0 1 e ] +"12 +[; ;./main.h: 12: unsigned int status_reg, alarm1_status, alarm2_status; +[v _status_reg `ui ~T0 @X0 1 e ] +[v _alarm1_status `ui ~T0 @X0 1 e ] +[v _alarm2_status `ui ~T0 @X0 1 e ] +"13 +[; ;./main.h: 13: unsigned int control_reg; +[v _control_reg `ui ~T0 @X0 1 e ] +"16 +[; ;./main.h: 16: unsigned int temperature_lsb = 0; +[v _temperature_lsb `ui ~T0 @X0 1 e ] +[i _temperature_lsb +-> -> 0 `i `ui +] +"17 +[; ;./main.h: 17: int temperature_msb = 0; +[v _temperature_msb `i ~T0 @X0 1 e ] +[i _temperature_msb +-> 0 `i +] +"18 +[; ;./main.h: 18: unsigned char temp_sign = ' '; +[v _temp_sign `uc ~T0 @X0 1 e ] +[i _temp_sign +-> -> 32 `ui `uc +] +"21 +[; ;./main.h: 21: char* weekday; +[v _weekday `*uc ~T0 @X0 1 e ] +"24 +[; ;./main.h: 24: unsigned int sec_chg = 0; +[v _sec_chg `ui ~T0 @X0 1 e ] +[i _sec_chg +-> -> 0 `i `ui +] +"27 +[; ;./main.h: 27: unsigned char sec_0, sec_1; +[v _sec_0 `uc ~T0 @X0 1 e ] +[v _sec_1 `uc ~T0 @X0 1 e ] +"28 +[; ;./main.h: 28: unsigned char min_0, min_1; +[v _min_0 `uc ~T0 @X0 1 e ] +[v _min_1 `uc ~T0 @X0 1 e ] +"29 +[; ;./main.h: 29: unsigned char hour_0, hour_1; +[v _hour_0 `uc ~T0 @X0 1 e ] +[v _hour_1 `uc ~T0 @X0 1 e ] +"30 +[; ;./main.h: 30: unsigned char day_0, day_1; +[v _day_0 `uc ~T0 @X0 1 e ] +[v _day_1 `uc ~T0 @X0 1 e ] +"31 +[; ;./main.h: 31: unsigned char month_0, month_1; +[v _month_0 `uc ~T0 @X0 1 e ] +[v _month_1 `uc ~T0 @X0 1 e ] +"32 +[; ;./main.h: 32: unsigned char year_0, year_1; +[v _year_0 `uc ~T0 @X0 1 e ] +[v _year_1 `uc ~T0 @X0 1 e ] +"33 +[; ;./main.h: 33: unsigned char temp_0, temp_1, temp_2; +[v _temp_0 `uc ~T0 @X0 1 e ] +[v _temp_1 `uc ~T0 @X0 1 e ] +[v _temp_2 `uc ~T0 @X0 1 e ] +"34 +[; ;./main.h: 34: unsigned char alarm1_sec_0, alarm1_sec_1, alarm1_min_0, alarm1_min_1, +[v _alarm1_sec_0 `uc ~T0 @X0 1 e ] +[v _alarm1_sec_1 `uc ~T0 @X0 1 e ] +[v _alarm1_min_0 `uc ~T0 @X0 1 e ] +[v _alarm1_min_1 `uc ~T0 @X0 1 e ] +"35 +[; ;./main.h: 35: alarm1_hour_0, alarm1_hour_1; +[v _alarm1_hour_0 `uc ~T0 @X0 1 e ] +[v _alarm1_hour_1 `uc ~T0 @X0 1 e ] +"36 +[; ;./main.h: 36: unsigned char alarm2_min_0, alarm2_min_1, alarm2_hour_0, alarm2_hour_1; +[v _alarm2_min_0 `uc ~T0 @X0 1 e ] +[v _alarm2_min_1 `uc ~T0 @X0 1 e ] +[v _alarm2_hour_0 `uc ~T0 @X0 1 e ] +[v _alarm2_hour_1 `uc ~T0 @X0 1 e ] +"39 +[; ;./main.h: 39: char buf[40]; +[v _buf `uc ~T0 @X0 -> 40 `i e ] +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"4 +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +[v $root$_main `(v ~T0 @X0 0 e ] +"17 main.c +[; ;main.c: 17: int main() { +[v _main `(i ~T0 @X0 1 ef ] +{ +[e :U _main ] +[f ] +"18 +[; ;main.c: 18: TRISC = 0x00; +[e = _TRISC -> -> 0 `i `uc ] +"19 +[; ;main.c: 19: PORTC = 0x00; +[e = _PORTC -> -> 0 `i `uc ] +"21 +[; ;main.c: 21: TRISD = 0x00; +[e = _TRISD -> -> 0 `i `uc ] +"22 +[; ;main.c: 22: PORTD = 0x00; +[e = _PORTD -> -> 0 `i `uc ] +"33 +[; ;main.c: 33: I2C_Master_Init(100000); +[e ( _I2C_Master_Init (1 -> -> 100000 `l `ul ] +"41 +[; ;main.c: 41: Lcd_Init(); +[e ( _Lcd_Init .. ] +"49 +[; ;main.c: 49: display_Intro(); +[e ( _display_Intro .. ] +"50 +[; ;main.c: 50: display_Lcd_Layout(); +[e ( _display_Lcd_Layout .. ] +"68 +[; ;main.c: 68: while (1) { +[e :U 98 ] +{ +"72 +[; ;main.c: 72: Update_Current_Date_Time(); +[e ( _Update_Current_Date_Time .. ] +"76 +[; ;main.c: 76: Read_Alarms_Temp(); +[e ( _Read_Alarms_Temp .. ] +"79 +[; ;main.c: 79: Get_Alarm_Status(); +[e ( _Get_Alarm_Status .. ] +"83 +[; ;main.c: 83: format_DateTimeChars(); +[e ( _format_DateTimeChars .. ] +"87 +[; ;main.c: 87: format_Temperature(); +[e ( _format_Temperature .. ] +"91 +[; ;main.c: 91: getWeekDay(dayofweek); +[e ( _getWeekDay (1 _dayofweek ] +"94 +[; ;main.c: 94: if (sec_chg != sec) { +[e $ ! != _sec_chg _sec 100 ] +{ +"96 +[; ;main.c: 96: update_Display(); +[e ( _update_Display .. ] +"99 +[; ;main.c: 99: sec_chg = sec; +[e = _sec_chg _sec ] +"121 +[; ;main.c: 121: } +} +[e :U 100 ] +"122 +[; ;main.c: 122: } +} +[e :U 97 ] +[e $U 98 ] +[e :U 99 ] +"124 +[; ;main.c: 124: return 0; +[e ) -> 0 `i ] +[e $UE 96 ] +"125 +[; ;main.c: 125: } +[e :UE 96 ] +} +"129 +[; ;main.c: 129: void format_DateTimeChars() { +[v _format_DateTimeChars `(v ~T0 @X0 1 ef ] +{ +[e :U _format_DateTimeChars ] +[f ] +"130 +[; ;main.c: 130: sec_0 = sec % 10 + '0'; +[e = _sec_0 -> + % _sec -> -> 10 `i `ui -> 48 `ui `uc ] +"131 +[; ;main.c: 131: sec_1 = sec / 10 + '0'; +[e = _sec_1 -> + / _sec -> -> 10 `i `ui -> 48 `ui `uc ] +"132 +[; ;main.c: 132: min_0 = min % 10 + '0'; +[e = _min_0 -> + % _min -> -> 10 `i `ui -> 48 `ui `uc ] +"133 +[; ;main.c: 133: min_1 = min / 10 + '0'; +[e = _min_1 -> + / _min -> -> 10 `i `ui -> 48 `ui `uc ] +"134 +[; ;main.c: 134: hour_0 = hour % 10 + '0'; +[e = _hour_0 -> + % _hour -> -> 10 `i `ui -> 48 `ui `uc ] +"135 +[; ;main.c: 135: hour_1 = hour / 10 + '0'; +[e = _hour_1 -> + / _hour -> -> 10 `i `ui -> 48 `ui `uc ] +"136 +[; ;main.c: 136: day_0 = date % 10 + '0'; +[e = _day_0 -> + % _date -> -> 10 `i `ui -> 48 `ui `uc ] +"137 +[; ;main.c: 137: day_1 = date / 10 + '0'; +[e = _day_1 -> + / _date -> -> 10 `i `ui -> 48 `ui `uc ] +"138 +[; ;main.c: 138: month_0 = month % 10 + '0'; +[e = _month_0 -> + % _month -> -> 10 `i `ui -> 48 `ui `uc ] +"139 +[; ;main.c: 139: month_1 = month / 10 + '0'; +[e = _month_1 -> + / _month -> -> 10 `i `ui -> 48 `ui `uc ] +"140 +[; ;main.c: 140: year_0 = year % 10 + '0'; +[e = _year_0 -> + % _year -> -> 10 `i `ui -> 48 `ui `uc ] +"141 +[; ;main.c: 141: year_1 = year / 10 + '0'; +[e = _year_1 -> + / _year -> -> 10 `i `ui -> 48 `ui `uc ] +"142 +[; ;main.c: 142: alarm1_sec_0 = alarm1_sec % 10 + '0'; +[e = _alarm1_sec_0 -> + % _alarm1_sec -> -> 10 `i `ui -> 48 `ui `uc ] +"143 +[; ;main.c: 143: alarm1_sec_1 = alarm1_sec / 10 + '0'; +[e = _alarm1_sec_1 -> + / _alarm1_sec -> -> 10 `i `ui -> 48 `ui `uc ] +"144 +[; ;main.c: 144: alarm1_min_0 = alarm1_min % 10 + '0'; +[e = _alarm1_min_0 -> + % _alarm1_min -> -> 10 `i `ui -> 48 `ui `uc ] +"145 +[; ;main.c: 145: alarm1_min_1 = alarm1_min / 10 + '0'; +[e = _alarm1_min_1 -> + / _alarm1_min -> -> 10 `i `ui -> 48 `ui `uc ] +"146 +[; ;main.c: 146: alarm1_hour_0 = alarm1_hour % 10 + '0'; +[e = _alarm1_hour_0 -> + % _alarm1_hour -> -> 10 `i `ui -> 48 `ui `uc ] +"147 +[; ;main.c: 147: alarm1_hour_1 = alarm1_hour / 10 + '0'; +[e = _alarm1_hour_1 -> + / _alarm1_hour -> -> 10 `i `ui -> 48 `ui `uc ] +"148 +[; ;main.c: 148: alarm2_min_0 = alarm2_min % 10 + '0'; +[e = _alarm2_min_0 -> + % _alarm2_min -> -> 10 `i `ui -> 48 `ui `uc ] +"149 +[; ;main.c: 149: alarm2_min_1 = alarm2_min / 10 + '0'; +[e = _alarm2_min_1 -> + / _alarm2_min -> -> 10 `i `ui -> 48 `ui `uc ] +"150 +[; ;main.c: 150: alarm2_hour_0 = alarm2_hour % 10 + '0'; +[e = _alarm2_hour_0 -> + % _alarm2_hour -> -> 10 `i `ui -> 48 `ui `uc ] +"151 +[; ;main.c: 151: alarm2_hour_1 = alarm2_hour / 10 + '0'; +[e = _alarm2_hour_1 -> + / _alarm2_hour -> -> 10 `i `ui -> 48 `ui `uc ] +"152 +[; ;main.c: 152: } +[e :UE 101 ] +} +"156 +[; ;main.c: 156: void format_Temperature() { +[v _format_Temperature `(v ~T0 @X0 1 ef ] +{ +[e :U _format_Temperature ] +[f ] +"158 +[; ;main.c: 158: if (temperature_msb < 0) { +[e $ ! < _temperature_msb -> 0 `i 103 ] +{ +"159 +[; ;main.c: 159: temperature_msb *= -1; +[e =* _temperature_msb -U -> 1 `i ] +"160 +[; ;main.c: 160: temp_sign = '-'; +[e = _temp_sign -> -> 45 `ui `uc ] +"161 +[; ;main.c: 161: } else { +} +[e $U 104 ] +[e :U 103 ] +{ +"162 +[; ;main.c: 162: temp_sign = '+'; +[e = _temp_sign -> -> 43 `ui `uc ] +"163 +[; ;main.c: 163: } +} +[e :U 104 ] +"166 +[; ;main.c: 166: temperature_lsb >>= 6; +[e =>> _temperature_lsb -> -> 6 `i `ui ] +"169 +[; ;main.c: 169: temperature_lsb *= 25; +[e =* _temperature_lsb -> -> 25 `i `ui ] +"171 +[; ;main.c: 171: if (temperature_lsb == 0) { +[e $ ! == _temperature_lsb -> -> 0 `i `ui 105 ] +{ +"172 +[; ;main.c: 172: temp_0 = '0'; +[e = _temp_0 -> -> 48 `ui `uc ] +"173 +[; ;main.c: 173: } +} +[e :U 105 ] +"175 +[; ;main.c: 175: if (temperature_lsb == 25) { +[e $ ! == _temperature_lsb -> -> 25 `i `ui 106 ] +{ +"176 +[; ;main.c: 176: temp_0 = '2'; +[e = _temp_0 -> -> 50 `ui `uc ] +"177 +[; ;main.c: 177: } +} +[e :U 106 ] +"179 +[; ;main.c: 179: if (temperature_lsb == 50) { +[e $ ! == _temperature_lsb -> -> 50 `i `ui 107 ] +{ +"180 +[; ;main.c: 180: temp_0 = '5'; +[e = _temp_0 -> -> 53 `ui `uc ] +"181 +[; ;main.c: 181: } +} +[e :U 107 ] +"183 +[; ;main.c: 183: if (temperature_lsb == 75) { +[e $ ! == _temperature_lsb -> -> 75 `i `ui 108 ] +{ +"184 +[; ;main.c: 184: temp_0 = '7'; +[e = _temp_0 -> -> 55 `ui `uc ] +"185 +[; ;main.c: 185: } +} +[e :U 108 ] +"187 +[; ;main.c: 187: temp_1 = temperature_msb % 10 + '0'; +[e = _temp_1 -> + -> % _temperature_msb -> 10 `i `ui -> 48 `ui `uc ] +"188 +[; ;main.c: 188: temp_2 = temperature_msb / 10 + '0'; +[e = _temp_2 -> + -> / _temperature_msb -> 10 `i `ui -> 48 `ui `uc ] +"189 +[; ;main.c: 189: } +[e :UE 102 ] +} +"193 +[; ;main.c: 193: void getWeekDay(unsigned int dayofweek) { +[v _getWeekDay `(v ~T0 @X0 1 ef1`ui ] +{ +[e :U _getWeekDay ] +[v _dayofweek `ui ~T0 @X0 1 r1 ] +[f ] +"194 +[; ;main.c: 194: switch (dayofweek) { +[e $U 111 ] +{ +"195 +[; ;main.c: 195: case 1: +[e :U 112 ] +"196 +[; ;main.c: 196: weekday = "Sun"; +[e = _weekday :s 1C ] +"197 +[; ;main.c: 197: break; +[e $U 110 ] +"198 +[; ;main.c: 198: case 2: +[e :U 113 ] +"199 +[; ;main.c: 199: weekday = "Mon"; +[e = _weekday :s 2C ] +"200 +[; ;main.c: 200: break; +[e $U 110 ] +"201 +[; ;main.c: 201: case 3: +[e :U 114 ] +"202 +[; ;main.c: 202: weekday = "Tue"; +[e = _weekday :s 3C ] +"203 +[; ;main.c: 203: break; +[e $U 110 ] +"204 +[; ;main.c: 204: case 4: +[e :U 115 ] +"205 +[; ;main.c: 205: weekday = "Wed"; +[e = _weekday :s 4C ] +"206 +[; ;main.c: 206: break; +[e $U 110 ] +"207 +[; ;main.c: 207: case 5: +[e :U 116 ] +"208 +[; ;main.c: 208: weekday = "Thu"; +[e = _weekday :s 5C ] +"209 +[; ;main.c: 209: break; +[e $U 110 ] +"210 +[; ;main.c: 210: case 6: +[e :U 117 ] +"211 +[; ;main.c: 211: weekday = "Fri"; +[e = _weekday :s 6C ] +"212 +[; ;main.c: 212: break; +[e $U 110 ] +"213 +[; ;main.c: 213: case 7: +[e :U 118 ] +"214 +[; ;main.c: 214: weekday = "Sat"; +[e = _weekday :s 7C ] +"215 +[; ;main.c: 215: break; +[e $U 110 ] +"216 +[; ;main.c: 216: } +} +[e $U 110 ] +[e :U 111 ] +[e [\ _dayofweek , $ -> -> 1 `i `ui 112 + , $ -> -> 2 `i `ui 113 + , $ -> -> 3 `i `ui 114 + , $ -> -> 4 `i `ui 115 + , $ -> -> 5 `i `ui 116 + , $ -> -> 6 `i `ui 117 + , $ -> -> 7 `i `ui 118 + 110 ] +[e :U 110 ] +"217 +[; ;main.c: 217: } +[e :UE 109 ] +} +"221 +[; ;main.c: 221: void Get_Alarm_Status() { +[v _Get_Alarm_Status `(v ~T0 @X0 1 ef ] +{ +[e :U _Get_Alarm_Status ] +[f ] +"222 +[; ;main.c: 222: alarm1_status = control_reg & 0x01; +[e = _alarm1_status & _control_reg -> -> 1 `i `ui ] +"223 +[; ;main.c: 223: alarm2_status = (control_reg >> 1) & 0x01; +[e = _alarm2_status & >> _control_reg -> 1 `i -> -> 1 `i `ui ] +"224 +[; ;main.c: 224: } +[e :UE 119 ] +} +"226 +[; ;main.c: 226: void display_Intro() { +[v _display_Intro `(v ~T0 @X0 1 ef ] +{ +[e :U _display_Intro ] +[f ] +"228 +[; ;main.c: 228: Lcd_Clear(); +[e ( _Lcd_Clear .. ] +"229 +[; ;main.c: 229: Lcd_Set_Cursor(1, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 1 `i `uc ] +"230 +[; ;main.c: 230: Lcd_Write_String("RTC/LCD with PIC"); +[e ( _Lcd_Write_String (1 :s 8C ] +"231 +[; ;main.c: 231: Lcd_Set_Cursor(2, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 1 `i `uc ] +"232 +[; ;main.c: 232: Lcd_Write_String(" Circuit Digest"); +[e ( _Lcd_Write_String (1 :s 9C ] +"233 +[; ;main.c: 233: _delay((unsigned long)((2000)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 2000 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"234 +[; ;main.c: 234: } +[e :UE 120 ] +} +"236 +[; ;main.c: 236: void display_Lcd_Layout() { +[v _display_Lcd_Layout `(v ~T0 @X0 1 ef ] +{ +[e :U _display_Lcd_Layout ] +[f ] +"238 +[; ;main.c: 238: Lcd_Clear(); +[e ( _Lcd_Clear .. ] +"239 +[; ;main.c: 239: Lcd_Set_Cursor(1, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 1 `i `uc ] +"240 +[; ;main.c: 240: Lcd_Write_String("HH:mm:ss -PP.P"); +[e ( _Lcd_Write_String (1 :s 10C ] +"241 +[; ;main.c: 241: Lcd_Write_Char(0xDF); +[e ( _Lcd_Write_Char (1 -> -> 223 `i `uc ] +"242 +[; ;main.c: 242: Lcd_Write_Char('C'); +[e ( _Lcd_Write_Char (1 -> -> 67 `ui `uc ] +"243 +[; ;main.c: 243: Lcd_Set_Cursor(2, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 1 `i `uc ] +"244 +[; ;main.c: 244: Lcd_Write_String("ddd, DD/MM/YY "); +[e ( _Lcd_Write_String (1 :s 11C ] +"245 +[; ;main.c: 245: _delay((unsigned long)((2000)*(20000000/4000.0))); +[e ( __delay (1 -> * -> -> 2000 `i `d / -> -> 20000000 `l `d .4000.0 `ul ] +"246 +[; ;main.c: 246: } +[e :UE 121 ] +} +"248 +[; ;main.c: 248: void update_Display() { +[v _update_Display `(v ~T0 @X0 1 ef ] +{ +[e :U _update_Display ] +[f ] +"250 +[; ;main.c: 250: Lcd_Set_Cursor(1, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 1 `i `uc ] +"251 +[; ;main.c: 251: Lcd_Write_Char(hour_1); +[e ( _Lcd_Write_Char (1 -> _hour_1 `uc ] +"252 +[; ;main.c: 252: Lcd_Write_Char(hour_0); +[e ( _Lcd_Write_Char (1 -> _hour_0 `uc ] +"255 +[; ;main.c: 255: Lcd_Set_Cursor(1, 4); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 4 `i `uc ] +"256 +[; ;main.c: 256: Lcd_Write_Char(min_1); +[e ( _Lcd_Write_Char (1 -> _min_1 `uc ] +"257 +[; ;main.c: 257: Lcd_Write_Char(min_0); +[e ( _Lcd_Write_Char (1 -> _min_0 `uc ] +"260 +[; ;main.c: 260: Lcd_Set_Cursor(1, 7); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 7 `i `uc ] +"261 +[; ;main.c: 261: Lcd_Write_Char(sec_1); +[e ( _Lcd_Write_Char (1 -> _sec_1 `uc ] +"262 +[; ;main.c: 262: Lcd_Write_Char(sec_0); +[e ( _Lcd_Write_Char (1 -> _sec_0 `uc ] +"265 +[; ;main.c: 265: Lcd_Set_Cursor(2, 6); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 6 `i `uc ] +"266 +[; ;main.c: 266: Lcd_Write_Char(day_1); +[e ( _Lcd_Write_Char (1 -> _day_1 `uc ] +"267 +[; ;main.c: 267: Lcd_Write_Char(day_0); +[e ( _Lcd_Write_Char (1 -> _day_0 `uc ] +"270 +[; ;main.c: 270: Lcd_Set_Cursor(2, 9); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 9 `i `uc ] +"271 +[; ;main.c: 271: Lcd_Write_Char(month_1); +[e ( _Lcd_Write_Char (1 -> _month_1 `uc ] +"272 +[; ;main.c: 272: Lcd_Write_Char(month_0); +[e ( _Lcd_Write_Char (1 -> _month_0 `uc ] +"275 +[; ;main.c: 275: Lcd_Set_Cursor(2, 12); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 12 `i `uc ] +"276 +[; ;main.c: 276: Lcd_Write_Char(year_1); +[e ( _Lcd_Write_Char (1 -> _year_1 `uc ] +"277 +[; ;main.c: 277: Lcd_Write_Char(year_0); +[e ( _Lcd_Write_Char (1 -> _year_0 `uc ] +"280 +[; ;main.c: 280: Lcd_Set_Cursor(2, 1); +[e ( _Lcd_Set_Cursor (2 , -> -> 2 `i `uc -> -> 1 `i `uc ] +"281 +[; ;main.c: 281: Lcd_Write_String(weekday); +[e ( _Lcd_Write_String (1 _weekday ] +"284 +[; ;main.c: 284: Lcd_Set_Cursor(1, 10); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 10 `i `uc ] +"285 +[; ;main.c: 285: Lcd_Write_Char(temp_sign); +[e ( _Lcd_Write_Char (1 -> _temp_sign `uc ] +"286 +[; ;main.c: 286: Lcd_Write_Char(temp_2); +[e ( _Lcd_Write_Char (1 -> _temp_2 `uc ] +"287 +[; ;main.c: 287: Lcd_Write_Char(temp_1); +[e ( _Lcd_Write_Char (1 -> _temp_1 `uc ] +"288 +[; ;main.c: 288: Lcd_Set_Cursor(1, 14); +[e ( _Lcd_Set_Cursor (2 , -> -> 1 `i `uc -> -> 14 `i `uc ] +"289 +[; ;main.c: 289: Lcd_Write_Char(temp_0); +[e ( _Lcd_Write_Char (1 -> _temp_0 `uc ] +"291 +[; ;main.c: 291: if (min == 00 && sec == 00) { +[e $ ! && == _min -> -> 0 `i `ui == _sec -> -> 0 `i `ui 123 ] +{ +"292 +[; ;main.c: 292: alarm(2); +[e ( _alarm (1 -> -> 2 `i `ui ] +"293 +[; ;main.c: 293: } +} +[e :U 123 ] +"295 +[; ;main.c: 295: if (min == 30 && sec == 00) { +[e $ ! && == _min -> -> 30 `i `ui == _sec -> -> 0 `i `ui 124 ] +{ +"296 +[; ;main.c: 296: alarm(1); +[e ( _alarm (1 -> -> 1 `i `ui ] +"297 +[; ;main.c: 297: } +} +[e :U 124 ] +"298 +[; ;main.c: 298: } +[e :UE 122 ] +} +[a 5C 84 104 117 0 ] +[a 9C 32 67 105 114 99 117 105 116 32 68 105 103 101 115 116 0 ] +[a 7C 83 97 116 0 ] +[a 1C 83 117 110 0 ] +[a 2C 77 111 110 0 ] +[a 6C 70 114 105 0 ] +[a 3C 84 117 101 0 ] +[a 4C 87 101 100 0 ] +[a 10C 72 72 58 109 109 58 115 115 32 45 80 80 46 80 0 ] +[a 8C 82 84 67 47 76 67 68 32 119 105 116 104 32 80 73 67 0 ] +[a 11C 100 100 100 44 32 68 68 47 77 77 47 89 89 32 32 0 ] diff --git a/build/default/production/main.p1.d b/build/default/production/main.p1.d new file mode 100755 index 0000000..36bbc29 --- /dev/null +++ b/build/default/production/main.p1.d @@ -0,0 +1,8 @@ +build/default/production/main.p1: \ +main.c \ +conf.h \ +main.h \ +lcd.h \ +i2c.h \ +ds3231.h \ +beep.h diff --git a/build/default/production/uart.i b/build/default/production/uart.i new file mode 100755 index 0000000..71a0d48 --- /dev/null +++ b/build/default/production/uart.i @@ -0,0 +1,1811 @@ +# 1 "uart.c" +# 1 "" 1 +# 1 "" 3 +# 288 "" 3 +# 1 "" 1 +# 1 "" 2 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\language_support.h" 1 3 +# 2 "" 2 +# 1 "uart.c" 2 + + +# 1 "./uart.h" 1 +void Initialize_UART(void); +void UART_send_char(char); +char UART_get_char(); +void UART_send_string(char *); +# 3 "uart.c" 2 + +# 1 "./conf.h" 1 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 18 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 3 +extern const char __xc8_OPTIM_SPEED; + +extern double __fpnormalize(double); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 1 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\c90\\xc8debug.h" 3 +#pragma intrinsic(__builtin_software_breakpoint) +extern void __builtin_software_breakpoint(void); +# 23 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 1 3 + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 1 3 + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 1 3 +# 4 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\htc.h" 2 3 +# 5 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 1 3 +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\__at.h" 1 3 +# 44 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 2 3 + + + + + + + + +extern volatile unsigned char INDF __attribute__((address(0x000))); + +__asm("INDF equ 00h"); + + + + +extern volatile unsigned char TMR0 __attribute__((address(0x001))); + +__asm("TMR0 equ 01h"); + + + + +extern volatile unsigned char PCL __attribute__((address(0x002))); + +__asm("PCL equ 02h"); + + + + +extern volatile unsigned char STATUS __attribute__((address(0x003))); + +__asm("STATUS equ 03h"); + + +typedef union { + struct { + unsigned C :1; + unsigned DC :1; + unsigned Z :1; + unsigned nPD :1; + unsigned nTO :1; + unsigned RP :2; + unsigned IRP :1; + }; + struct { + unsigned :5; + unsigned RP0 :1; + unsigned RP1 :1; + }; + struct { + unsigned CARRY :1; + unsigned :1; + unsigned ZERO :1; + }; +} STATUSbits_t; +extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +# 159 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char FSR __attribute__((address(0x004))); + +__asm("FSR equ 04h"); + + + + +extern volatile unsigned char PORTA __attribute__((address(0x005))); + +__asm("PORTA equ 05h"); + + +typedef union { + struct { + unsigned RA0 :1; + unsigned RA1 :1; + unsigned RA2 :1; + unsigned RA3 :1; + unsigned RA4 :1; + unsigned RA5 :1; + }; +} PORTAbits_t; +extern volatile PORTAbits_t PORTAbits __attribute__((address(0x005))); +# 216 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTB __attribute__((address(0x006))); + +__asm("PORTB equ 06h"); + + +typedef union { + struct { + unsigned RB0 :1; + unsigned RB1 :1; + unsigned RB2 :1; + unsigned RB3 :1; + unsigned RB4 :1; + unsigned RB5 :1; + unsigned RB6 :1; + unsigned RB7 :1; + }; +} PORTBbits_t; +extern volatile PORTBbits_t PORTBbits __attribute__((address(0x006))); +# 278 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTC __attribute__((address(0x007))); + +__asm("PORTC equ 07h"); + + +typedef union { + struct { + unsigned RC0 :1; + unsigned RC1 :1; + unsigned RC2 :1; + unsigned RC3 :1; + unsigned RC4 :1; + unsigned RC5 :1; + unsigned RC6 :1; + unsigned RC7 :1; + }; +} PORTCbits_t; +extern volatile PORTCbits_t PORTCbits __attribute__((address(0x007))); +# 340 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTD __attribute__((address(0x008))); + +__asm("PORTD equ 08h"); + + +typedef union { + struct { + unsigned RD0 :1; + unsigned RD1 :1; + unsigned RD2 :1; + unsigned RD3 :1; + unsigned RD4 :1; + unsigned RD5 :1; + unsigned RD6 :1; + unsigned RD7 :1; + }; +} PORTDbits_t; +extern volatile PORTDbits_t PORTDbits __attribute__((address(0x008))); +# 402 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PORTE __attribute__((address(0x009))); + +__asm("PORTE equ 09h"); + + +typedef union { + struct { + unsigned RE0 :1; + unsigned RE1 :1; + unsigned RE2 :1; + }; +} PORTEbits_t; +extern volatile PORTEbits_t PORTEbits __attribute__((address(0x009))); +# 434 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCLATH __attribute__((address(0x00A))); + +__asm("PCLATH equ 0Ah"); + + +typedef union { + struct { + unsigned PCLATH :5; + }; +} PCLATHbits_t; +extern volatile PCLATHbits_t PCLATHbits __attribute__((address(0x00A))); +# 454 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char INTCON __attribute__((address(0x00B))); + +__asm("INTCON equ 0Bh"); + + +typedef union { + struct { + unsigned RBIF :1; + unsigned INTF :1; + unsigned TMR0IF :1; + unsigned RBIE :1; + unsigned INTE :1; + unsigned TMR0IE :1; + unsigned PEIE :1; + unsigned GIE :1; + }; + struct { + unsigned :2; + unsigned T0IF :1; + unsigned :2; + unsigned T0IE :1; + }; +} INTCONbits_t; +extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +# 532 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR1 __attribute__((address(0x00C))); + +__asm("PIR1 equ 0Ch"); + + +typedef union { + struct { + unsigned TMR1IF :1; + unsigned TMR2IF :1; + unsigned CCP1IF :1; + unsigned SSPIF :1; + unsigned TXIF :1; + unsigned RCIF :1; + unsigned ADIF :1; + unsigned PSPIF :1; + }; +} PIR1bits_t; +extern volatile PIR1bits_t PIR1bits __attribute__((address(0x00C))); +# 594 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIR2 __attribute__((address(0x00D))); + +__asm("PIR2 equ 0Dh"); + + +typedef union { + struct { + unsigned CCP2IF :1; + unsigned :2; + unsigned BCLIF :1; + unsigned EEIF :1; + unsigned :1; + unsigned CMIF :1; + }; +} PIR2bits_t; +extern volatile PIR2bits_t PIR2bits __attribute__((address(0x00D))); +# 634 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short TMR1 __attribute__((address(0x00E))); + +__asm("TMR1 equ 0Eh"); + + + + +extern volatile unsigned char TMR1L __attribute__((address(0x00E))); + +__asm("TMR1L equ 0Eh"); + + + + +extern volatile unsigned char TMR1H __attribute__((address(0x00F))); + +__asm("TMR1H equ 0Fh"); + + + + +extern volatile unsigned char T1CON __attribute__((address(0x010))); + +__asm("T1CON equ 010h"); + + +typedef union { + struct { + unsigned TMR1ON :1; + unsigned TMR1CS :1; + unsigned nT1SYNC :1; + unsigned T1OSCEN :1; + unsigned T1CKPS :2; + }; + struct { + unsigned :2; + unsigned T1SYNC :1; + unsigned :1; + unsigned T1CKPS0 :1; + unsigned T1CKPS1 :1; + }; + struct { + unsigned :2; + unsigned T1INSYNC :1; + }; +} T1CONbits_t; +extern volatile T1CONbits_t T1CONbits __attribute__((address(0x010))); +# 730 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TMR2 __attribute__((address(0x011))); + +__asm("TMR2 equ 011h"); + + + + +extern volatile unsigned char T2CON __attribute__((address(0x012))); + +__asm("T2CON equ 012h"); + + +typedef union { + struct { + unsigned T2CKPS :2; + unsigned TMR2ON :1; + unsigned TOUTPS :4; + }; + struct { + unsigned T2CKPS0 :1; + unsigned T2CKPS1 :1; + unsigned :1; + unsigned TOUTPS0 :1; + unsigned TOUTPS1 :1; + unsigned TOUTPS2 :1; + unsigned TOUTPS3 :1; + }; +} T2CONbits_t; +extern volatile T2CONbits_t T2CONbits __attribute__((address(0x012))); +# 808 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPBUF __attribute__((address(0x013))); + +__asm("SSPBUF equ 013h"); + + + + +extern volatile unsigned char SSPCON __attribute__((address(0x014))); + +__asm("SSPCON equ 014h"); + + +typedef union { + struct { + unsigned SSPM :4; + unsigned CKP :1; + unsigned SSPEN :1; + unsigned SSPOV :1; + unsigned WCOL :1; + }; + struct { + unsigned SSPM0 :1; + unsigned SSPM1 :1; + unsigned SSPM2 :1; + unsigned SSPM3 :1; + }; +} SSPCONbits_t; +extern volatile SSPCONbits_t SSPCONbits __attribute__((address(0x014))); +# 885 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned short CCPR1 __attribute__((address(0x015))); + +__asm("CCPR1 equ 015h"); + + + + +extern volatile unsigned char CCPR1L __attribute__((address(0x015))); + +__asm("CCPR1L equ 015h"); + + + + +extern volatile unsigned char CCPR1H __attribute__((address(0x016))); + +__asm("CCPR1H equ 016h"); + + + + +extern volatile unsigned char CCP1CON __attribute__((address(0x017))); + +__asm("CCP1CON equ 017h"); + + +typedef union { + struct { + unsigned CCP1M :4; + unsigned CCP1Y :1; + unsigned CCP1X :1; + }; + struct { + unsigned CCP1M0 :1; + unsigned CCP1M1 :1; + unsigned CCP1M2 :1; + unsigned CCP1M3 :1; + }; +} CCP1CONbits_t; +extern volatile CCP1CONbits_t CCP1CONbits __attribute__((address(0x017))); +# 964 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char RCSTA __attribute__((address(0x018))); + +__asm("RCSTA equ 018h"); + + +typedef union { + struct { + unsigned RX9D :1; + unsigned OERR :1; + unsigned FERR :1; + unsigned ADDEN :1; + unsigned CREN :1; + unsigned SREN :1; + unsigned RX9 :1; + unsigned SPEN :1; + }; + struct { + unsigned RCD8 :1; + unsigned :5; + unsigned RC9 :1; + }; + struct { + unsigned :6; + unsigned nRC8 :1; + }; + struct { + unsigned :6; + unsigned RC8_9 :1; + }; +} RCSTAbits_t; +extern volatile RCSTAbits_t RCSTAbits __attribute__((address(0x018))); +# 1059 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXREG __attribute__((address(0x019))); + +__asm("TXREG equ 019h"); + + + + +extern volatile unsigned char RCREG __attribute__((address(0x01A))); + +__asm("RCREG equ 01Ah"); + + + + +extern volatile unsigned short CCPR2 __attribute__((address(0x01B))); + +__asm("CCPR2 equ 01Bh"); + + + + +extern volatile unsigned char CCPR2L __attribute__((address(0x01B))); + +__asm("CCPR2L equ 01Bh"); + + + + +extern volatile unsigned char CCPR2H __attribute__((address(0x01C))); + +__asm("CCPR2H equ 01Ch"); + + + + +extern volatile unsigned char CCP2CON __attribute__((address(0x01D))); + +__asm("CCP2CON equ 01Dh"); + + +typedef union { + struct { + unsigned CCP2M :4; + unsigned CCP2Y :1; + unsigned CCP2X :1; + }; + struct { + unsigned CCP2M0 :1; + unsigned CCP2M1 :1; + unsigned CCP2M2 :1; + unsigned CCP2M3 :1; + }; +} CCP2CONbits_t; +extern volatile CCP2CONbits_t CCP2CONbits __attribute__((address(0x01D))); +# 1152 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESH __attribute__((address(0x01E))); + +__asm("ADRESH equ 01Eh"); + + + + +extern volatile unsigned char ADCON0 __attribute__((address(0x01F))); + +__asm("ADCON0 equ 01Fh"); + + +typedef union { + struct { + unsigned ADON :1; + unsigned :1; + unsigned GO_nDONE :1; + unsigned CHS :3; + unsigned ADCS :2; + }; + struct { + unsigned :2; + unsigned GO :1; + unsigned CHS0 :1; + unsigned CHS1 :1; + unsigned CHS2 :1; + unsigned ADCS0 :1; + unsigned ADCS1 :1; + }; + struct { + unsigned :2; + unsigned nDONE :1; + }; + struct { + unsigned :2; + unsigned GO_DONE :1; + }; +} ADCON0bits_t; +extern volatile ADCON0bits_t ADCON0bits __attribute__((address(0x01F))); +# 1255 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char OPTION_REG __attribute__((address(0x081))); + +__asm("OPTION_REG equ 081h"); + + +typedef union { + struct { + unsigned PS :3; + unsigned PSA :1; + unsigned T0SE :1; + unsigned T0CS :1; + unsigned INTEDG :1; + unsigned nRBPU :1; + }; + struct { + unsigned PS0 :1; + unsigned PS1 :1; + unsigned PS2 :1; + }; +} OPTION_REGbits_t; +extern volatile OPTION_REGbits_t OPTION_REGbits __attribute__((address(0x081))); +# 1325 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISA __attribute__((address(0x085))); + +__asm("TRISA equ 085h"); + + +typedef union { + struct { + unsigned TRISA0 :1; + unsigned TRISA1 :1; + unsigned TRISA2 :1; + unsigned TRISA3 :1; + unsigned TRISA4 :1; + unsigned TRISA5 :1; + }; +} TRISAbits_t; +extern volatile TRISAbits_t TRISAbits __attribute__((address(0x085))); +# 1375 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISB __attribute__((address(0x086))); + +__asm("TRISB equ 086h"); + + +typedef union { + struct { + unsigned TRISB0 :1; + unsigned TRISB1 :1; + unsigned TRISB2 :1; + unsigned TRISB3 :1; + unsigned TRISB4 :1; + unsigned TRISB5 :1; + unsigned TRISB6 :1; + unsigned TRISB7 :1; + }; +} TRISBbits_t; +extern volatile TRISBbits_t TRISBbits __attribute__((address(0x086))); +# 1437 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISC __attribute__((address(0x087))); + +__asm("TRISC equ 087h"); + + +typedef union { + struct { + unsigned TRISC0 :1; + unsigned TRISC1 :1; + unsigned TRISC2 :1; + unsigned TRISC3 :1; + unsigned TRISC4 :1; + unsigned TRISC5 :1; + unsigned TRISC6 :1; + unsigned TRISC7 :1; + }; +} TRISCbits_t; +extern volatile TRISCbits_t TRISCbits __attribute__((address(0x087))); +# 1499 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISD __attribute__((address(0x088))); + +__asm("TRISD equ 088h"); + + +typedef union { + struct { + unsigned TRISD0 :1; + unsigned TRISD1 :1; + unsigned TRISD2 :1; + unsigned TRISD3 :1; + unsigned TRISD4 :1; + unsigned TRISD5 :1; + unsigned TRISD6 :1; + unsigned TRISD7 :1; + }; +} TRISDbits_t; +extern volatile TRISDbits_t TRISDbits __attribute__((address(0x088))); +# 1561 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TRISE __attribute__((address(0x089))); + +__asm("TRISE equ 089h"); + + +typedef union { + struct { + unsigned TRISE0 :1; + unsigned TRISE1 :1; + unsigned TRISE2 :1; + unsigned :1; + unsigned PSPMODE :1; + unsigned IBOV :1; + unsigned OBF :1; + unsigned IBF :1; + }; +} TRISEbits_t; +extern volatile TRISEbits_t TRISEbits __attribute__((address(0x089))); +# 1618 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE1 __attribute__((address(0x08C))); + +__asm("PIE1 equ 08Ch"); + + +typedef union { + struct { + unsigned TMR1IE :1; + unsigned TMR2IE :1; + unsigned CCP1IE :1; + unsigned SSPIE :1; + unsigned TXIE :1; + unsigned RCIE :1; + unsigned ADIE :1; + unsigned PSPIE :1; + }; +} PIE1bits_t; +extern volatile PIE1bits_t PIE1bits __attribute__((address(0x08C))); +# 1680 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PIE2 __attribute__((address(0x08D))); + +__asm("PIE2 equ 08Dh"); + + +typedef union { + struct { + unsigned CCP2IE :1; + unsigned :2; + unsigned BCLIE :1; + unsigned EEIE :1; + unsigned :1; + unsigned CMIE :1; + }; +} PIE2bits_t; +extern volatile PIE2bits_t PIE2bits __attribute__((address(0x08D))); +# 1720 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PCON __attribute__((address(0x08E))); + +__asm("PCON equ 08Eh"); + + +typedef union { + struct { + unsigned nBOR :1; + unsigned nPOR :1; + }; + struct { + unsigned nBO :1; + }; +} PCONbits_t; +extern volatile PCONbits_t PCONbits __attribute__((address(0x08E))); +# 1754 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SSPCON2 __attribute__((address(0x091))); + +__asm("SSPCON2 equ 091h"); + + +typedef union { + struct { + unsigned SEN :1; + unsigned RSEN :1; + unsigned PEN :1; + unsigned RCEN :1; + unsigned ACKEN :1; + unsigned ACKDT :1; + unsigned ACKSTAT :1; + unsigned GCEN :1; + }; +} SSPCON2bits_t; +extern volatile SSPCON2bits_t SSPCON2bits __attribute__((address(0x091))); +# 1816 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char PR2 __attribute__((address(0x092))); + +__asm("PR2 equ 092h"); + + + + +extern volatile unsigned char SSPADD __attribute__((address(0x093))); + +__asm("SSPADD equ 093h"); + + + + +extern volatile unsigned char SSPSTAT __attribute__((address(0x094))); + +__asm("SSPSTAT equ 094h"); + + +typedef union { + struct { + unsigned BF :1; + unsigned UA :1; + unsigned R_nW :1; + unsigned S :1; + unsigned P :1; + unsigned D_nA :1; + unsigned CKE :1; + unsigned SMP :1; + }; + struct { + unsigned :2; + unsigned R :1; + unsigned :2; + unsigned D :1; + }; + struct { + unsigned :2; + unsigned I2C_READ :1; + unsigned I2C_START :1; + unsigned I2C_STOP :1; + unsigned I2C_DATA :1; + }; + struct { + unsigned :2; + unsigned nW :1; + unsigned :2; + unsigned nA :1; + }; + struct { + unsigned :2; + unsigned nWRITE :1; + unsigned :2; + unsigned nADDRESS :1; + }; + struct { + unsigned :2; + unsigned R_W :1; + unsigned :2; + unsigned D_A :1; + }; + struct { + unsigned :2; + unsigned READ_WRITE :1; + unsigned :2; + unsigned DATA_ADDRESS :1; + }; +} SSPSTATbits_t; +extern volatile SSPSTATbits_t SSPSTATbits __attribute__((address(0x094))); +# 1999 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char TXSTA __attribute__((address(0x098))); + +__asm("TXSTA equ 098h"); + + +typedef union { + struct { + unsigned TX9D :1; + unsigned TRMT :1; + unsigned BRGH :1; + unsigned :1; + unsigned SYNC :1; + unsigned TXEN :1; + unsigned TX9 :1; + unsigned CSRC :1; + }; + struct { + unsigned TXD8 :1; + unsigned :5; + unsigned nTX8 :1; + }; + struct { + unsigned :6; + unsigned TX8_9 :1; + }; +} TXSTAbits_t; +extern volatile TXSTAbits_t TXSTAbits __attribute__((address(0x098))); +# 2080 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char SPBRG __attribute__((address(0x099))); + +__asm("SPBRG equ 099h"); + + + + +extern volatile unsigned char CMCON __attribute__((address(0x09C))); + +__asm("CMCON equ 09Ch"); + + +typedef union { + struct { + unsigned CM :3; + unsigned CIS :1; + unsigned C1INV :1; + unsigned C2INV :1; + unsigned C1OUT :1; + unsigned C2OUT :1; + }; + struct { + unsigned CM0 :1; + unsigned CM1 :1; + unsigned CM2 :1; + }; +} CMCONbits_t; +extern volatile CMCONbits_t CMCONbits __attribute__((address(0x09C))); +# 2157 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char CVRCON __attribute__((address(0x09D))); + +__asm("CVRCON equ 09Dh"); + + +typedef union { + struct { + unsigned CVR :4; + unsigned :1; + unsigned CVRR :1; + unsigned CVROE :1; + unsigned CVREN :1; + }; + struct { + unsigned CVR0 :1; + unsigned CVR1 :1; + unsigned CVR2 :1; + unsigned CVR3 :1; + }; +} CVRCONbits_t; +extern volatile CVRCONbits_t CVRCONbits __attribute__((address(0x09D))); +# 2222 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char ADRESL __attribute__((address(0x09E))); + +__asm("ADRESL equ 09Eh"); + + + + +extern volatile unsigned char ADCON1 __attribute__((address(0x09F))); + +__asm("ADCON1 equ 09Fh"); + + +typedef union { + struct { + unsigned PCFG :4; + unsigned :2; + unsigned ADCS2 :1; + unsigned ADFM :1; + }; + struct { + unsigned PCFG0 :1; + unsigned PCFG1 :1; + unsigned PCFG2 :1; + unsigned PCFG3 :1; + }; +} ADCON1bits_t; +extern volatile ADCON1bits_t ADCON1bits __attribute__((address(0x09F))); +# 2288 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EEDATA __attribute__((address(0x10C))); + +__asm("EEDATA equ 010Ch"); + + + + +extern volatile unsigned char EEADR __attribute__((address(0x10D))); + +__asm("EEADR equ 010Dh"); + + + + +extern volatile unsigned char EEDATH __attribute__((address(0x10E))); + +__asm("EEDATH equ 010Eh"); + + + + +extern volatile unsigned char EEADRH __attribute__((address(0x10F))); + +__asm("EEADRH equ 010Fh"); + + + + +extern volatile unsigned char EECON1 __attribute__((address(0x18C))); + +__asm("EECON1 equ 018Ch"); + + +typedef union { + struct { + unsigned RD :1; + unsigned WR :1; + unsigned WREN :1; + unsigned WRERR :1; + unsigned :3; + unsigned EEPGD :1; + }; +} EECON1bits_t; +extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +# 2361 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile unsigned char EECON2 __attribute__((address(0x18D))); + +__asm("EECON2 equ 018Dh"); +# 2374 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic16f877a.h" 3 +extern volatile __bit ACKDT __attribute__((address(0x48D))); + + +extern volatile __bit ACKEN __attribute__((address(0x48C))); + + +extern volatile __bit ACKSTAT __attribute__((address(0x48E))); + + +extern volatile __bit ADCS0 __attribute__((address(0xFE))); + + +extern volatile __bit ADCS1 __attribute__((address(0xFF))); + + +extern volatile __bit ADCS2 __attribute__((address(0x4FE))); + + +extern volatile __bit ADDEN __attribute__((address(0xC3))); + + +extern volatile __bit ADFM __attribute__((address(0x4FF))); + + +extern volatile __bit ADIE __attribute__((address(0x466))); + + +extern volatile __bit ADIF __attribute__((address(0x66))); + + +extern volatile __bit ADON __attribute__((address(0xF8))); + + +extern volatile __bit BCLIE __attribute__((address(0x46B))); + + +extern volatile __bit BCLIF __attribute__((address(0x6B))); + + +extern volatile __bit BF __attribute__((address(0x4A0))); + + +extern volatile __bit BRGH __attribute__((address(0x4C2))); + + +extern volatile __bit C1INV __attribute__((address(0x4E4))); + + +extern volatile __bit C1OUT __attribute__((address(0x4E6))); + + +extern volatile __bit C2INV __attribute__((address(0x4E5))); + + +extern volatile __bit C2OUT __attribute__((address(0x4E7))); + + +extern volatile __bit CARRY __attribute__((address(0x18))); + + +extern volatile __bit CCP1IE __attribute__((address(0x462))); + + +extern volatile __bit CCP1IF __attribute__((address(0x62))); + + +extern volatile __bit CCP1M0 __attribute__((address(0xB8))); + + +extern volatile __bit CCP1M1 __attribute__((address(0xB9))); + + +extern volatile __bit CCP1M2 __attribute__((address(0xBA))); + + +extern volatile __bit CCP1M3 __attribute__((address(0xBB))); + + +extern volatile __bit CCP1X __attribute__((address(0xBD))); + + +extern volatile __bit CCP1Y __attribute__((address(0xBC))); + + +extern volatile __bit CCP2IE __attribute__((address(0x468))); + + +extern volatile __bit CCP2IF __attribute__((address(0x68))); + + +extern volatile __bit CCP2M0 __attribute__((address(0xE8))); + + +extern volatile __bit CCP2M1 __attribute__((address(0xE9))); + + +extern volatile __bit CCP2M2 __attribute__((address(0xEA))); + + +extern volatile __bit CCP2M3 __attribute__((address(0xEB))); + + +extern volatile __bit CCP2X __attribute__((address(0xED))); + + +extern volatile __bit CCP2Y __attribute__((address(0xEC))); + + +extern volatile __bit CHS0 __attribute__((address(0xFB))); + + +extern volatile __bit CHS1 __attribute__((address(0xFC))); + + +extern volatile __bit CHS2 __attribute__((address(0xFD))); + + +extern volatile __bit CIS __attribute__((address(0x4E3))); + + +extern volatile __bit CKE __attribute__((address(0x4A6))); + + +extern volatile __bit CKP __attribute__((address(0xA4))); + + +extern volatile __bit CM0 __attribute__((address(0x4E0))); + + +extern volatile __bit CM1 __attribute__((address(0x4E1))); + + +extern volatile __bit CM2 __attribute__((address(0x4E2))); + + +extern volatile __bit CMIE __attribute__((address(0x46E))); + + +extern volatile __bit CMIF __attribute__((address(0x6E))); + + +extern volatile __bit CREN __attribute__((address(0xC4))); + + +extern volatile __bit CSRC __attribute__((address(0x4C7))); + + +extern volatile __bit CVR0 __attribute__((address(0x4E8))); + + +extern volatile __bit CVR1 __attribute__((address(0x4E9))); + + +extern volatile __bit CVR2 __attribute__((address(0x4EA))); + + +extern volatile __bit CVR3 __attribute__((address(0x4EB))); + + +extern volatile __bit CVREN __attribute__((address(0x4EF))); + + +extern volatile __bit CVROE __attribute__((address(0x4EE))); + + +extern volatile __bit CVRR __attribute__((address(0x4ED))); + + +extern volatile __bit DATA_ADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit DC __attribute__((address(0x19))); + + +extern volatile __bit D_A __attribute__((address(0x4A5))); + + +extern volatile __bit D_nA __attribute__((address(0x4A5))); + + +extern volatile __bit EEIE __attribute__((address(0x46C))); + + +extern volatile __bit EEIF __attribute__((address(0x6C))); + + +extern volatile __bit EEPGD __attribute__((address(0xC67))); + + +extern volatile __bit FERR __attribute__((address(0xC2))); + + +extern volatile __bit GCEN __attribute__((address(0x48F))); + + +extern volatile __bit GIE __attribute__((address(0x5F))); + + +extern volatile __bit GO __attribute__((address(0xFA))); + + +extern volatile __bit GO_DONE __attribute__((address(0xFA))); + + +extern volatile __bit GO_nDONE __attribute__((address(0xFA))); + + +extern volatile __bit I2C_DATA __attribute__((address(0x4A5))); + + +extern volatile __bit I2C_READ __attribute__((address(0x4A2))); + + +extern volatile __bit I2C_START __attribute__((address(0x4A3))); + + +extern volatile __bit I2C_STOP __attribute__((address(0x4A4))); + + +extern volatile __bit IBF __attribute__((address(0x44F))); + + +extern volatile __bit IBOV __attribute__((address(0x44D))); + + +extern volatile __bit INTE __attribute__((address(0x5C))); + + +extern volatile __bit INTEDG __attribute__((address(0x40E))); + + +extern volatile __bit INTF __attribute__((address(0x59))); + + +extern volatile __bit IRP __attribute__((address(0x1F))); + + +extern volatile __bit OBF __attribute__((address(0x44E))); + + +extern volatile __bit OERR __attribute__((address(0xC1))); + + +extern volatile __bit PCFG0 __attribute__((address(0x4F8))); + + +extern volatile __bit PCFG1 __attribute__((address(0x4F9))); + + +extern volatile __bit PCFG2 __attribute__((address(0x4FA))); + + +extern volatile __bit PCFG3 __attribute__((address(0x4FB))); + + +extern volatile __bit PEIE __attribute__((address(0x5E))); + + +extern volatile __bit PEN __attribute__((address(0x48A))); + + +extern volatile __bit PS0 __attribute__((address(0x408))); + + +extern volatile __bit PS1 __attribute__((address(0x409))); + + +extern volatile __bit PS2 __attribute__((address(0x40A))); + + +extern volatile __bit PSA __attribute__((address(0x40B))); + + +extern volatile __bit PSPIE __attribute__((address(0x467))); + + +extern volatile __bit PSPIF __attribute__((address(0x67))); + + +extern volatile __bit PSPMODE __attribute__((address(0x44C))); + + +extern volatile __bit RA0 __attribute__((address(0x28))); + + +extern volatile __bit RA1 __attribute__((address(0x29))); + + +extern volatile __bit RA2 __attribute__((address(0x2A))); + + +extern volatile __bit RA3 __attribute__((address(0x2B))); + + +extern volatile __bit RA4 __attribute__((address(0x2C))); + + +extern volatile __bit RA5 __attribute__((address(0x2D))); + + +extern volatile __bit RB0 __attribute__((address(0x30))); + + +extern volatile __bit RB1 __attribute__((address(0x31))); + + +extern volatile __bit RB2 __attribute__((address(0x32))); + + +extern volatile __bit RB3 __attribute__((address(0x33))); + + +extern volatile __bit RB4 __attribute__((address(0x34))); + + +extern volatile __bit RB5 __attribute__((address(0x35))); + + +extern volatile __bit RB6 __attribute__((address(0x36))); + + +extern volatile __bit RB7 __attribute__((address(0x37))); + + +extern volatile __bit RBIE __attribute__((address(0x5B))); + + +extern volatile __bit RBIF __attribute__((address(0x58))); + + +extern volatile __bit RC0 __attribute__((address(0x38))); + + +extern volatile __bit RC1 __attribute__((address(0x39))); + + +extern volatile __bit RC2 __attribute__((address(0x3A))); + + +extern volatile __bit RC3 __attribute__((address(0x3B))); + + +extern volatile __bit RC4 __attribute__((address(0x3C))); + + +extern volatile __bit RC5 __attribute__((address(0x3D))); + + +extern volatile __bit RC6 __attribute__((address(0x3E))); + + +extern volatile __bit RC7 __attribute__((address(0x3F))); + + +extern volatile __bit RC8_9 __attribute__((address(0xC6))); + + +extern volatile __bit RC9 __attribute__((address(0xC6))); + + +extern volatile __bit RCD8 __attribute__((address(0xC0))); + + +extern volatile __bit RCEN __attribute__((address(0x48B))); + + +extern volatile __bit RCIE __attribute__((address(0x465))); + + +extern volatile __bit RCIF __attribute__((address(0x65))); + + +extern volatile __bit RD __attribute__((address(0xC60))); + + +extern volatile __bit RD0 __attribute__((address(0x40))); + + +extern volatile __bit RD1 __attribute__((address(0x41))); + + +extern volatile __bit RD2 __attribute__((address(0x42))); + + +extern volatile __bit RD3 __attribute__((address(0x43))); + + +extern volatile __bit RD4 __attribute__((address(0x44))); + + +extern volatile __bit RD5 __attribute__((address(0x45))); + + +extern volatile __bit RD6 __attribute__((address(0x46))); + + +extern volatile __bit RD7 __attribute__((address(0x47))); + + +extern volatile __bit RE0 __attribute__((address(0x48))); + + +extern volatile __bit RE1 __attribute__((address(0x49))); + + +extern volatile __bit RE2 __attribute__((address(0x4A))); + + +extern volatile __bit READ_WRITE __attribute__((address(0x4A2))); + + +extern volatile __bit RP0 __attribute__((address(0x1D))); + + +extern volatile __bit RP1 __attribute__((address(0x1E))); + + +extern volatile __bit RSEN __attribute__((address(0x489))); + + +extern volatile __bit RX9 __attribute__((address(0xC6))); + + +extern volatile __bit RX9D __attribute__((address(0xC0))); + + +extern volatile __bit R_W __attribute__((address(0x4A2))); + + +extern volatile __bit R_nW __attribute__((address(0x4A2))); + + +extern volatile __bit SEN __attribute__((address(0x488))); + + +extern volatile __bit SMP __attribute__((address(0x4A7))); + + +extern volatile __bit SPEN __attribute__((address(0xC7))); + + +extern volatile __bit SREN __attribute__((address(0xC5))); + + +extern volatile __bit SSPEN __attribute__((address(0xA5))); + + +extern volatile __bit SSPIE __attribute__((address(0x463))); + + +extern volatile __bit SSPIF __attribute__((address(0x63))); + + +extern volatile __bit SSPM0 __attribute__((address(0xA0))); + + +extern volatile __bit SSPM1 __attribute__((address(0xA1))); + + +extern volatile __bit SSPM2 __attribute__((address(0xA2))); + + +extern volatile __bit SSPM3 __attribute__((address(0xA3))); + + +extern volatile __bit SSPOV __attribute__((address(0xA6))); + + +extern volatile __bit SYNC __attribute__((address(0x4C4))); + + +extern volatile __bit T0CS __attribute__((address(0x40D))); + + +extern volatile __bit T0IE __attribute__((address(0x5D))); + + +extern volatile __bit T0IF __attribute__((address(0x5A))); + + +extern volatile __bit T0SE __attribute__((address(0x40C))); + + +extern volatile __bit T1CKPS0 __attribute__((address(0x84))); + + +extern volatile __bit T1CKPS1 __attribute__((address(0x85))); + + +extern volatile __bit T1INSYNC __attribute__((address(0x82))); + + +extern volatile __bit T1OSCEN __attribute__((address(0x83))); + + +extern volatile __bit T1SYNC __attribute__((address(0x82))); + + +extern volatile __bit T2CKPS0 __attribute__((address(0x90))); + + +extern volatile __bit T2CKPS1 __attribute__((address(0x91))); + + +extern volatile __bit TMR0IE __attribute__((address(0x5D))); + + +extern volatile __bit TMR0IF __attribute__((address(0x5A))); + + +extern volatile __bit TMR1CS __attribute__((address(0x81))); + + +extern volatile __bit TMR1IE __attribute__((address(0x460))); + + +extern volatile __bit TMR1IF __attribute__((address(0x60))); + + +extern volatile __bit TMR1ON __attribute__((address(0x80))); + + +extern volatile __bit TMR2IE __attribute__((address(0x461))); + + +extern volatile __bit TMR2IF __attribute__((address(0x61))); + + +extern volatile __bit TMR2ON __attribute__((address(0x92))); + + +extern volatile __bit TOUTPS0 __attribute__((address(0x93))); + + +extern volatile __bit TOUTPS1 __attribute__((address(0x94))); + + +extern volatile __bit TOUTPS2 __attribute__((address(0x95))); + + +extern volatile __bit TOUTPS3 __attribute__((address(0x96))); + + +extern volatile __bit TRISA0 __attribute__((address(0x428))); + + +extern volatile __bit TRISA1 __attribute__((address(0x429))); + + +extern volatile __bit TRISA2 __attribute__((address(0x42A))); + + +extern volatile __bit TRISA3 __attribute__((address(0x42B))); + + +extern volatile __bit TRISA4 __attribute__((address(0x42C))); + + +extern volatile __bit TRISA5 __attribute__((address(0x42D))); + + +extern volatile __bit TRISB0 __attribute__((address(0x430))); + + +extern volatile __bit TRISB1 __attribute__((address(0x431))); + + +extern volatile __bit TRISB2 __attribute__((address(0x432))); + + +extern volatile __bit TRISB3 __attribute__((address(0x433))); + + +extern volatile __bit TRISB4 __attribute__((address(0x434))); + + +extern volatile __bit TRISB5 __attribute__((address(0x435))); + + +extern volatile __bit TRISB6 __attribute__((address(0x436))); + + +extern volatile __bit TRISB7 __attribute__((address(0x437))); + + +extern volatile __bit TRISC0 __attribute__((address(0x438))); + + +extern volatile __bit TRISC1 __attribute__((address(0x439))); + + +extern volatile __bit TRISC2 __attribute__((address(0x43A))); + + +extern volatile __bit TRISC3 __attribute__((address(0x43B))); + + +extern volatile __bit TRISC4 __attribute__((address(0x43C))); + + +extern volatile __bit TRISC5 __attribute__((address(0x43D))); + + +extern volatile __bit TRISC6 __attribute__((address(0x43E))); + + +extern volatile __bit TRISC7 __attribute__((address(0x43F))); + + +extern volatile __bit TRISD0 __attribute__((address(0x440))); + + +extern volatile __bit TRISD1 __attribute__((address(0x441))); + + +extern volatile __bit TRISD2 __attribute__((address(0x442))); + + +extern volatile __bit TRISD3 __attribute__((address(0x443))); + + +extern volatile __bit TRISD4 __attribute__((address(0x444))); + + +extern volatile __bit TRISD5 __attribute__((address(0x445))); + + +extern volatile __bit TRISD6 __attribute__((address(0x446))); + + +extern volatile __bit TRISD7 __attribute__((address(0x447))); + + +extern volatile __bit TRISE0 __attribute__((address(0x448))); + + +extern volatile __bit TRISE1 __attribute__((address(0x449))); + + +extern volatile __bit TRISE2 __attribute__((address(0x44A))); + + +extern volatile __bit TRMT __attribute__((address(0x4C1))); + + +extern volatile __bit TX8_9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9 __attribute__((address(0x4C6))); + + +extern volatile __bit TX9D __attribute__((address(0x4C0))); + + +extern volatile __bit TXD8 __attribute__((address(0x4C0))); + + +extern volatile __bit TXEN __attribute__((address(0x4C5))); + + +extern volatile __bit TXIE __attribute__((address(0x464))); + + +extern volatile __bit TXIF __attribute__((address(0x64))); + + +extern volatile __bit UA __attribute__((address(0x4A1))); + + +extern volatile __bit WCOL __attribute__((address(0xA7))); + + +extern volatile __bit WR __attribute__((address(0xC61))); + + +extern volatile __bit WREN __attribute__((address(0xC62))); + + +extern volatile __bit WRERR __attribute__((address(0xC63))); + + +extern volatile __bit ZERO __attribute__((address(0x1A))); + + +extern volatile __bit nA __attribute__((address(0x4A5))); + + +extern volatile __bit nADDRESS __attribute__((address(0x4A5))); + + +extern volatile __bit nBO __attribute__((address(0x470))); + + +extern volatile __bit nBOR __attribute__((address(0x470))); + + +extern volatile __bit nDONE __attribute__((address(0xFA))); + + +extern volatile __bit nPD __attribute__((address(0x1B))); + + +extern volatile __bit nPOR __attribute__((address(0x471))); + + +extern volatile __bit nRBPU __attribute__((address(0x40F))); + + +extern volatile __bit nRC8 __attribute__((address(0xC6))); + + +extern volatile __bit nT1SYNC __attribute__((address(0x82))); + + +extern volatile __bit nTO __attribute__((address(0x1C))); + + +extern volatile __bit nTX8 __attribute__((address(0x4C6))); + + +extern volatile __bit nW __attribute__((address(0x4A2))); + + +extern volatile __bit nWRITE __attribute__((address(0x4A2))); +# 2643 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic_chip_select.h" 2 3 +# 13 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 +# 30 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +#pragma intrinsic(__nop) +extern void __nop(void); +# 78 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +__attribute__((__unsupported__("The " "FLASH_READ" " macro function is no longer supported. Please use the MPLAB X MCC."))) unsigned char __flash_read(unsigned short addr); + +__attribute__((__unsupported__("The " "FLASH_WRITE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_write(unsigned short addr, unsigned short data); + +__attribute__((__unsupported__("The " "FLASH_ERASE" " macro function is no longer supported. Please use the MPLAB X MCC."))) void __flash_erase(unsigned short addr); + + + +# 1 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 1 3 +# 114 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\eeprom_routines.h" 3 +extern void eeprom_write(unsigned char addr, unsigned char value); +extern unsigned char eeprom_read(unsigned char addr); +# 85 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 2 3 + + + + + + +#pragma intrinsic(_delay) +extern __attribute__((nonreentrant)) void _delay(unsigned long); +#pragma intrinsic(_delaywdt) +extern __attribute__((nonreentrant)) void _delaywdt(unsigned long); +# 137 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\pic.h" 3 +extern __bank0 unsigned char __resetbits; +extern __bank0 __bit __powerdown; +extern __bank0 __bit __timeout; +# 27 "C:\\Program Files (x86)\\Microchip\\xc8\\v2.05\\pic\\include\\xc.h" 2 3 +# 1 "./conf.h" 2 + + + +#pragma config FOSC = HS +#pragma config WDTE = OFF +#pragma config PWRTE = ON +#pragma config BOREN = ON +#pragma config LVP = OFF +#pragma config CPD = OFF +#pragma config WRT = OFF +#pragma config CP = OFF +# 4 "uart.c" 2 + + +void Initialize_UART(void) { + + TRISC6 = 0; + TRISC7 = 1; + + + + + SPBRG = ((20000000 / 16) / 9600) - 1; + BRGH = 1; + + + + SYNC = 0; + SPEN = 1; + + + + TXEN = 1; + CREN = 1; + + + + TX9 = 0; + RX9 = 0; + +} + + + + + + +void UART_send_char(char bt) { + while (!TXIF); + TXREG = bt; +} + + + + + + +char UART_get_char() { + if (OERR) + { + CREN = 0; + CREN = 1; + } + + while (!RCIF); + + return RCREG; +} + + + + + + +void UART_send_string(char* st_pt) { + while (*st_pt) + UART_send_char(*st_pt++); +} diff --git a/build/default/production/uart.p1 b/build/default/production/uart.p1 new file mode 100755 index 0000000..ff18682 --- /dev/null +++ b/build/default/production/uart.p1 @@ -0,0 +1,363 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2977 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2977: extern volatile __bit TRISC6 __attribute__((address(0x43E))); +[v _TRISC6 `Vb ~T0 @X0 0 e@1086 ] +"2980 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2980: extern volatile __bit TRISC7 __attribute__((address(0x43F))); +[v _TRISC7 `Vb ~T0 @X0 0 e@1087 ] +"2080 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2080: extern volatile unsigned char SPBRG __attribute__((address(0x099))); +[v _SPBRG `Vuc ~T0 @X0 0 e@153 ] +"2416 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2416: extern volatile __bit BRGH __attribute__((address(0x4C2))); +[v _BRGH `Vb ~T0 @X0 0 e@1218 ] +"2842 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2842: extern volatile __bit SYNC __attribute__((address(0x4C4))); +[v _SYNC `Vb ~T0 @X0 0 e@1220 ] +"2812 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2812: extern volatile __bit SPEN __attribute__((address(0xC7))); +[v _SPEN `Vb ~T0 @X0 0 e@199 ] +"3031 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 3031: extern volatile __bit TXEN __attribute__((address(0x4C5))); +[v _TXEN `Vb ~T0 @X0 0 e@1221 ] +"2515 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2515: extern volatile __bit CREN __attribute__((address(0xC4))); +[v _CREN `Vb ~T0 @X0 0 e@196 ] +"3022 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 3022: extern volatile __bit TX9 __attribute__((address(0x4C6))); +[v _TX9 `Vb ~T0 @X0 0 e@1222 ] +"2794 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2794: extern volatile __bit RX9 __attribute__((address(0xC6))); +[v _RX9 `Vb ~T0 @X0 0 e@198 ] +"3037 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 3037: extern volatile __bit TXIF __attribute__((address(0x64))); +[v _TXIF `Vb ~T0 @X0 0 e@100 ] +"1059 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1059: extern volatile unsigned char TXREG __attribute__((address(0x019))); +[v _TXREG `Vuc ~T0 @X0 0 e@25 ] +"2614 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2614: extern volatile __bit OERR __attribute__((address(0xC1))); +[v _OERR `Vb ~T0 @X0 0 e@193 ] +"2743 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2743: extern volatile __bit RCIF __attribute__((address(0x65))); +[v _RCIF `Vb ~T0 @X0 0 e@101 ] +"1066 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1066: extern volatile unsigned char RCREG __attribute__((address(0x01A))); +[v _RCREG `Vuc ~T0 @X0 0 e@26 ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"4 ./conf.h +[p x FOSC = HS ] +"5 +[p x WDTE = OFF ] +"6 +[p x PWRTE = ON ] +"7 +[p x BOREN = ON ] +"8 +[p x LVP = OFF ] +"9 +[p x CPD = OFF ] +"10 +[p x WRT = OFF ] +"11 +[p x CP = OFF ] +"6 uart.c +[; ;uart.c: 6: void Initialize_UART(void) { +[v _Initialize_UART `(v ~T0 @X0 1 ef ] +{ +[e :U _Initialize_UART ] +[f ] +"8 +[; ;uart.c: 8: TRISC6 = 0; +[e = _TRISC6 -> -> 0 `i `b ] +"9 +[; ;uart.c: 9: TRISC7 = 1; +[e = _TRISC7 -> -> 1 `i `b ] +"14 +[; ;uart.c: 14: SPBRG = ((20000000 / 16) / 9600) - 1; +[e = _SPBRG -> - / / -> 20000000 `l -> -> 16 `i `l -> -> 9600 `i `l -> -> 1 `i `l `uc ] +"15 +[; ;uart.c: 15: BRGH = 1; +[e = _BRGH -> -> 1 `i `b ] +"19 +[; ;uart.c: 19: SYNC = 0; +[e = _SYNC -> -> 0 `i `b ] +"20 +[; ;uart.c: 20: SPEN = 1; +[e = _SPEN -> -> 1 `i `b ] +"24 +[; ;uart.c: 24: TXEN = 1; +[e = _TXEN -> -> 1 `i `b ] +"25 +[; ;uart.c: 25: CREN = 1; +[e = _CREN -> -> 1 `i `b ] +"29 +[; ;uart.c: 29: TX9 = 0; +[e = _TX9 -> -> 0 `i `b ] +"30 +[; ;uart.c: 30: RX9 = 0; +[e = _RX9 -> -> 0 `i `b ] +"32 +[; ;uart.c: 32: } +[e :UE 95 ] +} +"39 +[; ;uart.c: 39: void UART_send_char(char bt) { +[v _UART_send_char `(v ~T0 @X0 1 ef1`uc ] +{ +[e :U _UART_send_char ] +[v _bt `uc ~T0 @X0 1 r1 ] +[f ] +"40 +[; ;uart.c: 40: while (!TXIF); +[e $U 97 ] +[e :U 98 ] +[e :U 97 ] +[e $ ! _TXIF 98 ] +[e :U 99 ] +"41 +[; ;uart.c: 41: TXREG = bt; +[e = _TXREG -> _bt `uc ] +"42 +[; ;uart.c: 42: } +[e :UE 96 ] +} +"49 +[; ;uart.c: 49: char UART_get_char() { +[v _UART_get_char `(uc ~T0 @X0 1 ef ] +{ +[e :U _UART_get_char ] +[f ] +"50 +[; ;uart.c: 50: if (OERR) +[e $ ! _OERR 101 ] +"51 +[; ;uart.c: 51: { +{ +"52 +[; ;uart.c: 52: CREN = 0; +[e = _CREN -> -> 0 `i `b ] +"53 +[; ;uart.c: 53: CREN = 1; +[e = _CREN -> -> 1 `i `b ] +"54 +[; ;uart.c: 54: } +} +[e :U 101 ] +"56 +[; ;uart.c: 56: while (!RCIF); +[e $U 102 ] +[e :U 103 ] +[e :U 102 ] +[e $ ! _RCIF 103 ] +[e :U 104 ] +"58 +[; ;uart.c: 58: return RCREG; +[e ) -> _RCREG `uc ] +[e $UE 100 ] +"59 +[; ;uart.c: 59: } +[e :UE 100 ] +} +"66 +[; ;uart.c: 66: void UART_send_string(char* st_pt) { +[v _UART_send_string `(v ~T0 @X0 1 ef1`*uc ] +{ +[e :U _UART_send_string ] +[v _st_pt `*uc ~T0 @X0 1 r1 ] +[f ] +"67 +[; ;uart.c: 67: while (*st_pt) +[e $U 106 ] +[e :U 107 ] +"68 +[; ;uart.c: 68: UART_send_char(*st_pt++); +[e ( _UART_send_char (1 *U ++ _st_pt * -> -> 1 `i `x -> -> # *U _st_pt `i `x ] +[e :U 106 ] +"67 +[; ;uart.c: 67: while (*st_pt) +[e $ != -> *U _st_pt `i -> 0 `i 107 ] +[e :U 108 ] +"69 +[; ;uart.c: 69: } +[e :UE 105 ] +} diff --git a/build/default/production/uart.p1.d b/build/default/production/uart.p1.d new file mode 100755 index 0000000..063661b --- /dev/null +++ b/build/default/production/uart.p1.d @@ -0,0 +1,4 @@ +build/default/production/uart.p1: \ +uart.c \ +uart.h \ +conf.h -- cgit v1.2.3-54-g00ecf