From e6bffe23c87a9f6de8abdec747600f674b9cab62 Mon Sep 17 00:00:00 2001 From: William Harrington Date: Sat, 27 Jul 2019 22:16:27 -0500 Subject: Copy project files into repo --- conf.h | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) create mode 100755 conf.h (limited to 'conf.h') diff --git a/conf.h b/conf.h new file mode 100755 index 0000000..c63df84 --- /dev/null +++ b/conf.h @@ -0,0 +1,34 @@ +#include + +// BEGIN CONFIG +#pragma config FOSC = HS // Oscillator Selection bits (HS oscillator) +#pragma config WDTE = OFF // Watchdog Timer Enable bit (WDT enabled) +#pragma config PWRTE = ON // Power-up Timer Enable bit (PWRT disabled) +#pragma config BOREN = ON // Brown-out Reset Enable bit (BOR enabled) +#pragma config LVP = OFF // Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit (RB3 is digital I/O, HV on MCLR must be used for programming) +#pragma config CPD = OFF // Data EEPROM Memory Code Protection bit (Data EEPROM code protection off) +#pragma config WRT = OFF // Flash Program Memory Write Enable bits (Write protection off; all program memory may be written to by EECON control) +#pragma config CP = OFF // Flash Program Memory Code Protection bit (Code protection off) +// END CONFIG + +// Use internal crystal at 8MHz +#define _XTAL_FREQ 20000000 + +// Define baud rate of 9600 +#define Baud_rate 9600 + +// HD44780 +#define RS RD2 // Register Select on RD2 +#define EN RD3 // Enable on RD3 +#define D4 RD4 // Data 4 on RD4 +#define D5 RD5 // Data 5 on RD5 +#define D6 RD6 // Data 6 on RD6 +#define D7 RD7 // Data 7 on RD7 + +//Define Buttons +#define SETB RE0 +#define DECR RE1 +#define INCR RE2 + +//Define Buzz +#define BEEP RD1 \ No newline at end of file -- cgit v1.2.3-54-g00ecf