From e6bffe23c87a9f6de8abdec747600f674b9cab62 Mon Sep 17 00:00:00 2001 From: William Harrington Date: Sat, 27 Jul 2019 22:16:27 -0500 Subject: Copy project files into repo --- dist/default/production/__eeprom.p1 | 750 ++++++++++++++++++++++++++++++++++++ 1 file changed, 750 insertions(+) create mode 100755 dist/default/production/__eeprom.p1 (limited to 'dist/default/production/__eeprom.p1') diff --git a/dist/default/production/__eeprom.p1 b/dist/default/production/__eeprom.p1 new file mode 100755 index 0000000..96410cd --- /dev/null +++ b/dist/default/production/__eeprom.p1 @@ -0,0 +1,750 @@ +Version 4.0 HI-TECH Software Intermediate Code +"2322 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2322: struct { +[s S94 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :3 `uc 1 :1 `uc 1 ] +[n S94 . RD WR WREN WRERR . EEPGD ] +"2321 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2321: typedef union { +[u S93 `S94 1 ] +[n S93 . . ] +"2331 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2331: extern volatile EECON1bits_t EECON1bits __attribute__((address(0x18C))); +[v _EECON1bits `VS93 ~T0 @X0 0 e@396 ] +"2295 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2295: extern volatile unsigned char EEADR __attribute__((address(0x10D))); +[v _EEADR `Vuc ~T0 @X0 0 e@269 ] +"2316 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2316: extern volatile unsigned char EECON1 __attribute__((address(0x18C))); +[v _EECON1 `Vuc ~T0 @X0 0 e@396 ] +"2288 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2288: extern volatile unsigned char EEDATA __attribute__((address(0x10C))); +[v _EEDATA `Vuc ~T0 @X0 0 e@268 ] +"79 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 79: struct { +[s S2 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S2 . C DC Z nPD nTO RP IRP ] +"88 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 88: struct { +[s S3 :5 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S3 . . RP0 RP1 ] +"93 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 93: struct { +[s S4 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S4 . CARRY . ZERO ] +"78 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 78: typedef union { +[u S1 `S2 1 `S3 1 `S4 1 ] +[n S1 . . . . ] +"99 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 99: extern volatile STATUSbits_t STATUSbits __attribute__((address(0x003))); +[v _STATUSbits `VS1 ~T0 @X0 0 e@3 ] +"460 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 460: struct { +[s S18 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 :1 `uc 1 ] +[n S18 . RBIF INTF TMR0IF RBIE INTE TMR0IE PEIE GIE ] +"470 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 470: struct { +[s S19 :2 `uc 1 :1 `uc 1 :2 `uc 1 :1 `uc 1 ] +[n S19 . . T0IF . T0IE ] +"459 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 459: typedef union { +[u S17 `S18 1 `S19 1 ] +[n S17 . . . ] +"477 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 477: extern volatile INTCONbits_t INTCONbits __attribute__((address(0x00B))); +[v _INTCONbits `VS17 ~T0 @X0 0 e@11 ] +"2361 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2361: extern volatile unsigned char EECON2 __attribute__((address(0x18D))); +[v _EECON2 `Vuc ~T0 @X0 0 e@397 ] +"54 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 54: __asm("INDF equ 00h"); +[; <" INDF equ 00h ;# "> +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 61: __asm("TMR0 equ 01h"); +[; <" TMR0 equ 01h ;# "> +"68 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 68: __asm("PCL equ 02h"); +[; <" PCL equ 02h ;# "> +"75 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 75: __asm("STATUS equ 03h"); +[; <" STATUS equ 03h ;# "> +"161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 161: __asm("FSR equ 04h"); +[; <" FSR equ 04h ;# "> +"168 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 168: __asm("PORTA equ 05h"); +[; <" PORTA equ 05h ;# "> +"218 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 218: __asm("PORTB equ 06h"); +[; <" PORTB equ 06h ;# "> +"280 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 280: __asm("PORTC equ 07h"); +[; <" PORTC equ 07h ;# "> +"342 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 342: __asm("PORTD equ 08h"); +[; <" PORTD equ 08h ;# "> +"404 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 404: __asm("PORTE equ 09h"); +[; <" PORTE equ 09h ;# "> +"436 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 436: __asm("PCLATH equ 0Ah"); +[; <" PCLATH equ 0Ah ;# "> +"456 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 456: __asm("INTCON equ 0Bh"); +[; <" INTCON equ 0Bh ;# "> +"534 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 534: __asm("PIR1 equ 0Ch"); +[; <" PIR1 equ 0Ch ;# "> +"596 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 596: __asm("PIR2 equ 0Dh"); +[; <" PIR2 equ 0Dh ;# "> +"636 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 636: __asm("TMR1 equ 0Eh"); +[; <" TMR1 equ 0Eh ;# "> +"643 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 643: __asm("TMR1L equ 0Eh"); +[; <" TMR1L equ 0Eh ;# "> +"650 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 650: __asm("TMR1H equ 0Fh"); +[; <" TMR1H equ 0Fh ;# "> +"657 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 657: __asm("T1CON equ 010h"); +[; <" T1CON equ 010h ;# "> +"732 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 732: __asm("TMR2 equ 011h"); +[; <" TMR2 equ 011h ;# "> +"739 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 739: __asm("T2CON equ 012h"); +[; <" T2CON equ 012h ;# "> +"810 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 810: __asm("SSPBUF equ 013h"); +[; <" SSPBUF equ 013h ;# "> +"817 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 817: __asm("SSPCON equ 014h"); +[; <" SSPCON equ 014h ;# "> +"887 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 887: __asm("CCPR1 equ 015h"); +[; <" CCPR1 equ 015h ;# "> +"894 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 894: __asm("CCPR1L equ 015h"); +[; <" CCPR1L equ 015h ;# "> +"901 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 901: __asm("CCPR1H equ 016h"); +[; <" CCPR1H equ 016h ;# "> +"908 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 908: __asm("CCP1CON equ 017h"); +[; <" CCP1CON equ 017h ;# "> +"966 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 966: __asm("RCSTA equ 018h"); +[; <" RCSTA equ 018h ;# "> +"1061 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1061: __asm("TXREG equ 019h"); +[; <" TXREG equ 019h ;# "> +"1068 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1068: __asm("RCREG equ 01Ah"); +[; <" RCREG equ 01Ah ;# "> +"1075 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1075: __asm("CCPR2 equ 01Bh"); +[; <" CCPR2 equ 01Bh ;# "> +"1082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1082: __asm("CCPR2L equ 01Bh"); +[; <" CCPR2L equ 01Bh ;# "> +"1089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1089: __asm("CCPR2H equ 01Ch"); +[; <" CCPR2H equ 01Ch ;# "> +"1096 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1096: __asm("CCP2CON equ 01Dh"); +[; <" CCP2CON equ 01Dh ;# "> +"1154 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1154: __asm("ADRESH equ 01Eh"); +[; <" ADRESH equ 01Eh ;# "> +"1161 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1161: __asm("ADCON0 equ 01Fh"); +[; <" ADCON0 equ 01Fh ;# "> +"1257 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1257: __asm("OPTION_REG equ 081h"); +[; <" OPTION_REG equ 081h ;# "> +"1327 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1327: __asm("TRISA equ 085h"); +[; <" TRISA equ 085h ;# "> +"1377 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1377: __asm("TRISB equ 086h"); +[; <" TRISB equ 086h ;# "> +"1439 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1439: __asm("TRISC equ 087h"); +[; <" TRISC equ 087h ;# "> +"1501 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1501: __asm("TRISD equ 088h"); +[; <" TRISD equ 088h ;# "> +"1563 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1563: __asm("TRISE equ 089h"); +[; <" TRISE equ 089h ;# "> +"1620 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1620: __asm("PIE1 equ 08Ch"); +[; <" PIE1 equ 08Ch ;# "> +"1682 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1682: __asm("PIE2 equ 08Dh"); +[; <" PIE2 equ 08Dh ;# "> +"1722 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1722: __asm("PCON equ 08Eh"); +[; <" PCON equ 08Eh ;# "> +"1756 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1756: __asm("SSPCON2 equ 091h"); +[; <" SSPCON2 equ 091h ;# "> +"1818 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1818: __asm("PR2 equ 092h"); +[; <" PR2 equ 092h ;# "> +"1825 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1825: __asm("SSPADD equ 093h"); +[; <" SSPADD equ 093h ;# "> +"1832 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 1832: __asm("SSPSTAT equ 094h"); +[; <" SSPSTAT equ 094h ;# "> +"2001 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2001: __asm("TXSTA equ 098h"); +[; <" TXSTA equ 098h ;# "> +"2082 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2082: __asm("SPBRG equ 099h"); +[; <" SPBRG equ 099h ;# "> +"2089 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2089: __asm("CMCON equ 09Ch"); +[; <" CMCON equ 09Ch ;# "> +"2159 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2159: __asm("CVRCON equ 09Dh"); +[; <" CVRCON equ 09Dh ;# "> +"2224 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2224: __asm("ADRESL equ 09Eh"); +[; <" ADRESL equ 09Eh ;# "> +"2231 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2231: __asm("ADCON1 equ 09Fh"); +[; <" ADCON1 equ 09Fh ;# "> +"2290 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2290: __asm("EEDATA equ 010Ch"); +[; <" EEDATA equ 010Ch ;# "> +"2297 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2297: __asm("EEADR equ 010Dh"); +[; <" EEADR equ 010Dh ;# "> +"2304 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2304: __asm("EEDATH equ 010Eh"); +[; <" EEDATH equ 010Eh ;# "> +"2311 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2311: __asm("EEADRH equ 010Fh"); +[; <" EEADRH equ 010Fh ;# "> +"2318 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2318: __asm("EECON1 equ 018Ch"); +[; <" EECON1 equ 018Ch ;# "> +"2363 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\include\pic16f877a.h: 2363: __asm("EECON2 equ 018Dh"); +[; <" EECON2 equ 018Dh ;# "> +"6 C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: __eecpymem(volatile unsigned char *to, __eeprom unsigned char * from, unsigned char size) +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: } +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: } +[v ___eecpymem `(v ~T0 @X0 1 ef3`*Vuc`*Euc`uc ] +"7 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: { +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: unsigned int +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: +{ +[e :U ___eecpymem ] +"6 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: __eecpymem(volatile unsigned char *to, __eeprom unsigned char * from, unsigned char size) +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: } +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 6: } +[v _to `*Vuc ~T0 @X0 1 r1 ] +[v _from `*Euc ~T0 @X0 1 r2 ] +[v _size `uc ~T0 @X0 1 r3 ] +"7 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: { +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: unsigned int +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 7: +[f ] +"8 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 8: volatile unsigned char *cp = to; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 8: __itoee(__eeprom void *addr, unsigned int data) +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 8: double +[v _cp `*Vuc ~T0 @X0 1 a ] +[e = _cp _to ] +"10 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 10: while (EECON1bits.WR) continue; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 10: __memcpyee(addr,(unsigned char *) &data,2); +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 10: { +[e $U 96 ] +[e :U 97 ] +[e $U 96 ] +[e :U 96 ] +[e $ != -> . . _EECON1bits 0 1 `i -> 0 `i 97 ] +[e :U 98 ] +"11 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 11: EEADR = (unsigned char)from; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 11: return data; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 11: double data; +[e = _EEADR -> _from `uc ] +"12 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: while(size--) { +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: } +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: __eecpymem((unsigned char *) &data,addr,4); +[e $U 99 ] +[e :U 100 ] +{ +"13 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 13: while (EECON1bits.WR) continue; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 13: +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 13: return data; +[e $U 102 ] +[e :U 103 ] +[e $U 102 ] +[e :U 102 ] +[e $ != -> . . _EECON1bits 0 1 `i -> 0 `i 103 ] +[e :U 104 ] +"15 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 15: EECON1 &= 0x7F; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 15: +[e =& _EECON1 -> -> 127 `i `Vuc ] +"17 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 17: EECON1bits.RD = 1; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 17: __fttoee(__eeprom void *addr, float data) +[e = . . _EECON1bits 0 0 -> -> 1 `i `uc ] +"18 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 18: *cp++ = EEDATA; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 18: { +[e = *U ++ _cp * -> -> 1 `i `x -> -> # *U _cp `i `x _EEDATA ] +"19 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 19: ++EEADR; +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 19: __memcpyee(addr,(unsigned char *) &data,3); +[e =+ _EEADR -> -> 1 `i `Vuc ] +"20 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 20: } +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 20: return data; +} +[e :U 99 ] +"12 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: while(size--) { +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: } +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 12: __eecpymem((unsigned char *) &data,addr,4); +[e $ != -> -- _size -> -> 1 `i `uc `i -> 0 `i 100 ] +[e :U 101 ] +"36 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 36: } +[e :UE 95 ] +} +"39 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 39: __memcpyee(__eeprom unsigned char * to, const unsigned char *from, unsigned char size) +[v ___memcpyee `(v ~T0 @X0 1 ef3`*Euc`*Cuc`uc ] +"40 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 40: { +{ +[e :U ___memcpyee ] +"39 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 39: __memcpyee(__eeprom unsigned char * to, const unsigned char *from, unsigned char size) +[v _to `*Euc ~T0 @X0 1 r1 ] +[v _from `*Cuc ~T0 @X0 1 r2 ] +[v _size `uc ~T0 @X0 1 r3 ] +"40 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 40: { +[f ] +"41 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 41: const unsigned char *ptr =from; +[v _ptr `*Cuc ~T0 @X0 1 a ] +[e = _ptr _from ] +"43 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 43: while (EECON1bits.WR) continue; +[e $U 106 ] +[e :U 107 ] +[e $U 106 ] +[e :U 106 ] +[e $ != -> . . _EECON1bits 0 1 `i -> 0 `i 107 ] +[e :U 108 ] +"44 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 44: EEADR = (unsigned char)to - 1U; +[e = _EEADR -> - -> -> _to `uc `ui -> 1 `ui `uc ] +"46 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 46: EECON1 &= 0x7F; +[e =& _EECON1 -> -> 127 `i `Vuc ] +"48 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 48: while(size--) { +[e $U 109 ] +[e :U 110 ] +{ +"49 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 49: while (EECON1bits.WR) { +[e $U 112 ] +[e :U 113 ] +{ +"50 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 50: continue; +[e $U 112 ] +"51 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 51: } +} +[e :U 112 ] +"49 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 49: while (EECON1bits.WR) { +[e $ != -> . . _EECON1bits 0 1 `i -> 0 `i 113 ] +[e :U 114 ] +"52 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 52: EEDATA = *ptr++; +[e = _EEDATA *U ++ _ptr * -> -> 1 `i `x -> -> # *U _ptr `i `x ] +"53 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 53: ++EEADR; +[e =+ _EEADR -> -> 1 `i `Vuc ] +"54 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 54: STATUSbits.CARRY = 0; +[e = . . _STATUSbits 2 0 -> -> 0 `i `uc ] +"55 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 55: if (INTCONbits.GIE) { +[e $ ! != -> . . _INTCONbits 0 7 `i -> 0 `i 115 ] +{ +"56 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 56: STATUSbits.CARRY = 1; +[e = . . _STATUSbits 2 0 -> -> 1 `i `uc ] +"57 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 57: } +} +[e :U 115 ] +"58 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 58: INTCONbits.GIE = 0; +[e = . . _INTCONbits 0 7 -> -> 0 `i `uc ] +"59 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 59: EECON1bits.WREN = 1; +[e = . . _EECON1bits 0 2 -> -> 1 `i `uc ] +"60 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 60: EECON2 = 0x55; +[e = _EECON2 -> -> 85 `i `uc ] +"61 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 61: EECON2 = 0xAA; +[e = _EECON2 -> -> 170 `i `uc ] +"62 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 62: EECON1bits.WR = 1; +[e = . . _EECON1bits 0 1 -> -> 1 `i `uc ] +"63 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 63: EECON1bits.WREN = 0; +[e = . . _EECON1bits 0 2 -> -> 0 `i `uc ] +"64 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 64: if (STATUSbits.CARRY) { +[e $ ! != -> . . _STATUSbits 2 0 `i -> 0 `i 116 ] +{ +"65 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 65: INTCONbits.GIE = 1; +[e = . . _INTCONbits 0 7 -> -> 1 `i `uc ] +"66 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 66: } +} +[e :U 116 ] +"67 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 67: } +} +[e :U 109 ] +"48 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 48: while(size--) { +[e $ != -> -- _size -> -> 1 `i `uc `i -> 0 `i 110 ] +[e :U 111 ] +"101 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 101: } +[e :UE 105 ] +} +"104 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 104: __eetoc(__eeprom void *addr) +[v ___eetoc `(uc ~T0 @X0 1 ef1`*Ev ] +"105 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 105: { +{ +[e :U ___eetoc ] +"104 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 104: __eetoc(__eeprom void *addr) +[v _addr `*Ev ~T0 @X0 1 r1 ] +"105 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 105: { +[f ] +"106 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 106: unsigned char data; +[v _data `uc ~T0 @X0 1 a ] +"107 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 107: __eecpymem((unsigned char *) &data,addr,1); +[e ( ___eecpymem (3 , , -> &U _data `*Vuc -> _addr `*Euc -> -> 1 `i `uc ] +"108 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 108: return data; +[e ) _data ] +[e $UE 117 ] +"109 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 109: } +[e :UE 117 ] +} +"112 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 112: __eetoi(__eeprom void *addr) +[v ___eetoi `(ui ~T0 @X0 1 ef1`*Ev ] +"113 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 113: { +{ +[e :U ___eetoi ] +"112 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 112: __eetoi(__eeprom void *addr) +[v _addr `*Ev ~T0 @X0 1 r1 ] +"113 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 113: { +[f ] +"114 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 114: unsigned int data; +[v _data `ui ~T0 @X0 1 a ] +"115 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 115: __eecpymem((unsigned char *) &data,addr,2); +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 2 `i `uc ] +"116 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 116: return data; +[e ) _data ] +[e $UE 118 ] +"117 +[; ;C:\Program Files (x86)\Microchip\xc8\v2.05\pic\sources\c90\pic\__eeprom.c: 117: } +[e :UE 118 ] +} +"119 +[p k ] +"120 +[p n 2040 ] +"122 +[v ___eetom `(um ~T0 @X0 1 ef1`*Ev ] +"123 +{ +[e :U ___eetom ] +"122 +[v _addr `*Ev ~T0 @X0 1 r1 ] +"123 +[f ] +"124 +[v _data `um ~T0 @X0 1 a ] +"125 +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 3 `i `uc ] +"126 +[e ) _data ] +[e $UE 119 ] +"127 +[e :UE 119 ] +} +"128 +[p o ] +"131 +[v ___eetol `(ul ~T0 @X0 1 ef1`*Ev ] +"132 +{ +[e :U ___eetol ] +"131 +[v _addr `*Ev ~T0 @X0 1 r1 ] +"132 +[f ] +"133 +[v _data `ul ~T0 @X0 1 a ] +"134 +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 4 `i `uc ] +"135 +[e ) _data ] +[e $UE 120 ] +"136 +[e :UE 120 ] +} +"138 +[p k ] +"139 +[p n 1516 ] +"141 +[v ___eetoo `(uo ~T0 @X0 1 ef1`*Ev ] +"142 +{ +[e :U ___eetoo ] +"141 +[v _addr `*Ev ~T0 @X0 1 r1 ] +"142 +[f ] +"143 +[v _data `uo ~T0 @X0 1 a ] +"144 +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 8 `i `uc ] +"145 +[e ) _data ] +[e $UE 121 ] +"146 +[e :UE 121 ] +} +"147 +[p o ] +"150 +[v ___ctoee `(uc ~T0 @X0 1 ef2`*Ev`uc ] +"151 +{ +[e :U ___ctoee ] +"150 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `uc ~T0 @X0 1 r2 ] +"151 +[f ] +"152 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> &U _data `*Cuc -> -> 1 `i `uc ] +"153 +[e ) _data ] +[e $UE 122 ] +"154 +[e :UE 122 ] +} +"157 +[v ___itoee `(ui ~T0 @X0 1 ef2`*Ev`ui ] +"158 +{ +[e :U ___itoee ] +"157 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `ui ~T0 @X0 1 r2 ] +"158 +[f ] +"159 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 2 `i `uc ] +"160 +[e ) _data ] +[e $UE 123 ] +"161 +[e :UE 123 ] +} +"163 +[p k ] +"164 +[p n 2040 ] +"166 +[v ___mtoee `(um ~T0 @X0 1 ef2`*Ev`um ] +"167 +{ +[e :U ___mtoee ] +"166 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `um ~T0 @X0 1 r2 ] +"167 +[f ] +"168 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 3 `i `uc ] +"169 +[e ) _data ] +[e $UE 124 ] +"170 +[e :UE 124 ] +} +"171 +[p o ] +"174 +[v ___ltoee `(ul ~T0 @X0 1 ef2`*Ev`ul ] +"175 +{ +[e :U ___ltoee ] +"174 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `ul ~T0 @X0 1 r2 ] +"175 +[f ] +"176 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 4 `i `uc ] +"177 +[e ) _data ] +[e $UE 125 ] +"178 +[e :UE 125 ] +} +"180 +[p k ] +"181 +[p n 1516 ] +"183 +[v ___otoee `(uo ~T0 @X0 1 ef2`*Ev`uo ] +"184 +{ +[e :U ___otoee ] +"183 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `uo ~T0 @X0 1 r2 ] +"184 +[f ] +"185 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 8 `i `uc ] +"186 +[e ) _data ] +[e $UE 126 ] +"187 +[e :UE 126 ] +} +"188 +[p o ] +"191 +[v ___eetoft `(f ~T0 @X0 1 ef1`*Ev ] +"192 +{ +[e :U ___eetoft ] +"191 +[v _addr `*Ev ~T0 @X0 1 r1 ] +"192 +[f ] +"193 +[v _data `f ~T0 @X0 1 a ] +"194 +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 3 `i `uc ] +"195 +[e ) _data ] +[e $UE 127 ] +"196 +[e :UE 127 ] +} +"199 +[v ___eetofl `(d ~T0 @X0 1 ef1`*Ev ] +"200 +{ +[e :U ___eetofl ] +"199 +[v _addr `*Ev ~T0 @X0 1 r1 ] +"200 +[f ] +"201 +[v _data `d ~T0 @X0 1 a ] +"202 +[e ( ___eecpymem (3 , , -> -> &U _data `*uc `*Vuc -> _addr `*Euc -> -> 4 `i `uc ] +"203 +[e ) _data ] +[e $UE 128 ] +"204 +[e :UE 128 ] +} +"207 +[v ___fttoee `(f ~T0 @X0 1 ef2`*Ev`f ] +"208 +{ +[e :U ___fttoee ] +"207 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `f ~T0 @X0 1 r2 ] +"208 +[f ] +"209 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 3 `i `uc ] +"210 +[e ) _data ] +[e $UE 129 ] +"211 +[e :UE 129 ] +} +"214 +[v ___fltoee `(d ~T0 @X0 1 ef2`*Ev`d ] +"215 +{ +[e :U ___fltoee ] +"214 +[v _addr `*Ev ~T0 @X0 1 r1 ] +[v _data `d ~T0 @X0 1 r2 ] +"215 +[f ] +"216 +[e ( ___memcpyee (3 , , -> _addr `*Euc -> -> &U _data `*uc `*Cuc -> -> 4 `i `uc ] +"217 +[e ) _data ] +[e $UE 130 ] +"218 +[e :UE 130 ] +} -- cgit v1.2.3-54-g00ecf