From 52762d73679754e5ff950bf0e053960bd9ab8944 Mon Sep 17 00:00:00 2001 From: William Harrington Date: Wed, 31 Mar 2021 11:00:30 -0500 Subject: Update all projects. --- .../8Bit_LED_bkout/8Bit_LED_bkout.brd | 687 +++++++++++++++++++++ 1 file changed, 687 insertions(+) create mode 100644 eagle/Breadboard Breakouts/8Bit_LED_bkout/8Bit_LED_bkout.brd (limited to 'eagle/Breadboard Breakouts/8Bit_LED_bkout/8Bit_LED_bkout.brd') diff --git a/eagle/Breadboard Breakouts/8Bit_LED_bkout/8Bit_LED_bkout.brd b/eagle/Breadboard Breakouts/8Bit_LED_bkout/8Bit_LED_bkout.brd new file mode 100644 index 0000000..fe7a4db --- /dev/null +++ b/eagle/Breadboard Breakouts/8Bit_LED_bkout/8Bit_LED_bkout.brd @@ -0,0 +1,687 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +8-bit Data +LED Bkout +8-bit Data +LED Bkout +Berzerkula.org + + + + + + + + +K +K +C.C. + + + +<b>Pin Header Connectors</b><p> +<author>Created by librarian@cadsoft.de</author> + + +<b>PIN HEADER</b> + + + + + + + + + +>NAME +>VALUE + + + + + +PIN HEADER + + + + + + + +<b>LEDs</b><p> +<author>Created by librarian@cadsoft.de</author><br> +Extended by Federico Battaglin <author>&lt;federico.rd@fdpinternational.com&gt;</author> with DUOLED + + +<b>CHIPLED</b><p> +Source: http://www.osram.convergy.de/ ... LG_LY N971.pdf + + + + + + +>NAME +>VALUE + + + + + + + + + + + + + + + +CHIPLED +Source: http://www.osram.convergy.de/ ... LG_LY N971.pdf + + + + + + + +<h3> PCBLayout.com - Frequently Used <i>Resistor Array</i></h3> + +Visit us at <a href="http://www.PCBLayout.com">PCBLayout.com</a> for quick and hassle-free PCB Layout/Manufacturing ordering experience. +<BR> +<BR> +This library has been generated by our experienced pcb layout engineers using current IPC and/or industry standards. We <b>believe</b> the content to be accurate, complete and current. But, this content is provided as a courtesy and <u>user assumes all risk and responsiblity of it's usage</u>. +<BR> +<BR> +Feel free to contact us at <a href="mailto:Support@PCBLayout.com">Support@PCBLayout.com</a> if you have any questions/concerns regarding any of our content or services. + + +10-Chiparray 4-Side Flat, 0.80 mm pitch, 4.00 X 2.10 X 0.55 mm body +<p>10-pin Chiparray 4-Side Flat package with 0.80 mm pitch with body size 4.00 X 2.10 X 0.55 mm</p> + + + + + + + + + + + + + + + + + + + + + + + + + + + +>NAME +>VALUE + + + + +10-Chiparray 4-Side Flat, 0.80 mm pitch, 4.00 X 2.10 X 0.55 mm body +<p>10-pin Chiparray 4-Side Flat package with 0.80 mm pitch with body size 4.00 X 2.10 X 0.55 mm</p> + + + + + + + + + + + + + + + + +<b>OSH Park Design Rules</b> +<p> +Please make sure your boards conform to these design rules. +</p> +<p> +Note, that not all DRC settings must be set by the manufacturer. Several can be adjusted for the design, including those listed on our docs page here. +<a href="http://docs.oshpark.com/design-tools/eagle/design-rules-files/">Adjustable Settings</a> +</p> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +Since Version 6.2.2 text objects can contain more than one line, +which will not be processed correctly with this version. + + +Since Version 8.2, EAGLE supports online libraries. The ids +of those online libraries will not be understood (or retained) +with this version. + + +Since Version 8.3, EAGLE supports Fusion synchronisation. +This feature will not be available in this version and saving +the document will break the link to the Fusion PCB feature. + + +Since Version 8.3, EAGLE supports URNs for individual library +assets (packages, symbols, and devices). The URNs of those assets +will not be understood (or retained) with this version. + + +Since Version 8.3, EAGLE supports the association of 3D packages +with devices in libraries, schematics, and board files. Those 3D +packages will not be understood (or retained) with this version. + + + -- cgit v1.2.3-54-g00ecf