diff options
| author | William Harrington <kb0iic@berzerkula.org> | 2024-07-13 19:24:25 -0500 |
|---|---|---|
| committer | William Harrington <kb0iic@berzerkula.org> | 2024-07-13 19:24:25 -0500 |
| commit | 6c75082aad720b958ab18d965e7c4bef2e0f97af (patch) | |
| tree | 8ab22019f74a07132d5ec28d189000677ed672fc /eagle/design rules | |
| parent | cceb5e82b0e293372273d1fe5e2c595636c86800 (diff) | |
| parent | dbcdefb64ab8eb866f6bffade8275001905489c9 (diff) | |
Resolve conflicts.
Diffstat (limited to 'eagle/design rules')
| -rw-r--r-- | eagle/design rules/DESCRIPTION | 3 | ||||
| -rw-r--r-- | eagle/design rules/default.dru | 73 |
2 files changed, 76 insertions, 0 deletions
diff --git a/eagle/design rules/DESCRIPTION b/eagle/design rules/DESCRIPTION new file mode 100644 index 0000000..c6f8523 --- /dev/null +++ b/eagle/design rules/DESCRIPTION @@ -0,0 +1,3 @@ +<b>User Design Rules</b> +<p> +This folder contains user Design Rules files.
\ No newline at end of file diff --git a/eagle/design rules/default.dru b/eagle/design rules/default.dru new file mode 100644 index 0000000..07d199b --- /dev/null +++ b/eagle/design rules/default.dru @@ -0,0 +1,73 @@ +description[de] = <b>EAGLE Design Rules</b>\n<p>\nDie Standard-Design-Rules sind so gewählt, dass sie für \ndie meisten Anwendungen passen. Sollte ihre Platine \nbesondere Anforderungen haben, treffen Sie die erforderlichen\nEinstellungen hier und speichern die Design Rules unter \neinem neuen Namen ab. +description[en] = <b>EAGLE Design Rules</b>\n<p>\nThe default Design Rules have been set to cover\na wide range of applications. Your particular design\nmay have different requirements, so please make the\nnecessary adjustments and save your customized\ndesign rules under a new name. +layerSetup = (1*16) +mtCopper = 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm 0.035mm +mtIsolate = 1.5mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm 0.15mm 0.2mm +mdWireWire = 6mil +mdWirePad = 6mil +mdWireVia = 6mil +mdPadPad = 6mil +mdPadVia = 6mil +mdViaVia = 6mil +mdSmdPad = 6mil +mdSmdVia = 6mil +mdSmdSmd = 6mil +mdViaViaSameLayer = 6mil +mnLayersViaInSmd = 2 +mdCopperDimension = 40mil +mdDrill = 6mil +mdSmdStop = 0mil +msWidth = 6mil +msDrill = 0.35mm +msMicroVia = 9.99mm +msBlindViaRatio = 0.500000 +rvPadTop = 0.250000 +rvPadInner = 0.250000 +rvPadBottom = 0.250000 +rvViaOuter = 0.250000 +rvViaInner = 0.250000 +rvMicroViaOuter = 0.250000 +rvMicroViaInner = 0.250000 +rlMinPadTop = 10mil +rlMaxPadTop = 20mil +rlMinPadInner = 10mil +rlMaxPadInner = 20mil +rlMinPadBottom = 10mil +rlMaxPadBottom = 20mil +rlMinViaOuter = 8mil +rlMaxViaOuter = 20mil +rlMinViaInner = 8mil +rlMaxViaInner = 20mil +rlMinMicroViaOuter = 4mil +rlMaxMicroViaOuter = 20mil +rlMinMicroViaInner = 4mil +rlMaxMicroViaInner = 20mil +psTop = -1 +psBottom = -1 +psFirst = -1 +psElongationLong = 100 +psElongationOffset = 100 +mvStopFrame = 1.000000 +mvCreamFrame = 0.000000 +mlMinStopFrame = 4mil +mlMaxStopFrame = 4mil +mlMinCreamFrame = 0mil +mlMaxCreamFrame = 0mil +mlViaStopLimit = 0mil +srRoundness = 0.000000 +srMinRoundness = 0mil +srMaxRoundness = 0mil +slThermalGap = 0.500000 +slMinThermalGap = 20mil +slMaxThermalGap = 100mil +slAnnulusIsolate = 20mil +slThermalIsolate = 10mil +slAnnulusRestring = 0 +slThermalRestring = 1 +slThermalsForVias = 0 +checkGrid = 0 +checkAngle = 0 +checkFont = 1 +checkRestrict = 1 +useDiameter = 13 +maxErrors = 50 |