diff options
author | William Harrington <kb0iic@berzerkula.org> | 2018-05-17 20:54:06 -0500 |
---|---|---|
committer | William Harrington <kb0iic@berzerkula.org> | 2018-05-17 20:54:06 -0500 |
commit | 5851c4758d3301851cf58e0ec3b42c7f93c7ca77 (patch) | |
tree | cc5a864a539f8b453b336a16be9c37dcf0a5f221 /eagle/lbr/speech.lbr | |
parent | 8854dc9392a1bf8bb4137874c1f24f6825e07fc6 (diff) |
Populate repository from main eagle directory in user's document library.
Diffstat (limited to 'eagle/lbr/speech.lbr')
-rwxr-xr-x | eagle/lbr/speech.lbr | 352 |
1 files changed, 352 insertions, 0 deletions
diff --git a/eagle/lbr/speech.lbr b/eagle/lbr/speech.lbr new file mode 100755 index 0000000..c693bc5 --- /dev/null +++ b/eagle/lbr/speech.lbr @@ -0,0 +1,352 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="8.3.2"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting keepoldvectorfont="yes"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="yes" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/> +<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/> +<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" 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x="20.32" y="-17.78" visible="pin" length="middle" rot="R180"/> +<pin name="VCC" x="20.32" y="-15.24" visible="pin" length="middle" rot="R180"/> +<pin name="D1" x="20.32" y="-12.7" visible="pin" length="middle" rot="R180"/> +<pin name="DO" x="20.32" y="-10.16" visible="pin" length="middle" rot="R180"/> +<pin name="C0" x="20.32" y="-7.62" visible="pin" length="middle" rot="R180"/> +<pin name="C1" x="20.32" y="-5.08" visible="pin" length="middle" rot="R180"/> +<pin name="C2" x="20.32" y="-2.54" visible="pin" length="middle" rot="R180"/> +<pin name="C3" x="20.32" y="0" visible="pin" length="middle" rot="R180"/> +<pin name="C4" x="20.32" y="2.54" visible="pin" length="middle" rot="R180"/> +<pin name="C5" x="20.32" y="5.08" visible="pin" length="middle" rot="R180"/> +<pin name="C6" x="20.32" y="7.62" visible="pin" length="middle" rot="R180"/> +<pin name="C7" x="20.32" y="10.16" visible="pin" length="middle" rot="R180"/> +<pin name="MC" x="20.32" y="12.7" visible="pin" length="middle" rot="R180"/> +<pin name="B3/TXD" x="20.32" y="15.24" visible="pin" length="middle" rot="R180"/> +<pin name="B4/ALATCH" x="20.32" y="17.78" visible="pin" length="middle" rot="R180"/> +<pin name="B6/ENABLE" x="20.32" y="20.32" visible="pin" length="middle" rot="R180"/> +<pin name="VSS" x="20.32" y="22.86" visible="pin" length="middle" rot="R180"/> +<wire x1="-17.78" y1="-27.94" x2="15.24" y2="-27.94" width="0.254" layer="95"/> +<wire x1="15.24" y1="-27.94" x2="15.24" y2="25.4" width="0.254" layer="94"/> +<wire x1="15.24" y1="25.4" x2="-17.78" y2="25.4" width="0.254" layer="94"/> +<wire x1="-17.78" y1="25.4" x2="-17.78" y2="-27.94" width="0.254" layer="94"/> +<text x="-2.54" y="-30.48" size="1.778" layer="96" rot="R180">CTS256A-AL2</text> +<text x="-7.62" y="27.94" size="2.54" layer="95">>NAME</text> +</symbol> +</symbols> +<devicesets> +<deviceset name="SP0256-AL2" prefix="U"> +<description>General Instruments SP0256-AL2 vintage speech synthesizer IC</description> +<gates> +<gate name="G$1" symbol="SP0256AL2" x="0" y="0"/> +</gates> +<devices> +<device name="" package="DIL28-6"> +<connects> +<connect gate="G$1" pin="!ALD" pad="P$20"/> +<connect gate="G$1" pin="!LRQ" pad="P$9"/> +<connect gate="G$1" pin="!RESET" pad="P$2"/> +<connect gate="G$1" pin="!SBYRESET" pad="P$25"/> +<connect gate="G$1" pin="A1" pad="P$18"/> +<connect gate="G$1" pin="A2" pad="P$17"/> +<connect gate="G$1" pin="A3" pad="P$16"/> +<connect gate="G$1" pin="A4" pad="P$15"/> +<connect gate="G$1" pin="A5" pad="P$14"/> +<connect gate="G$1" pin="A6" pad="P$13"/> +<connect gate="G$1" pin="A7" pad="P$11"/> +<connect gate="G$1" pin="A8" pad="P$10"/> +<connect gate="G$1" pin="C1" pad="P$4"/> +<connect gate="G$1" pin="C2" pad="P$5"/> +<connect gate="G$1" pin="C3" pad="P$6"/> +<connect gate="G$1" pin="DIGITALOUT" pad="P$24"/> +<connect gate="G$1" pin="OSC1" pad="P$27"/> +<connect gate="G$1" pin="OSC2" pad="P$28"/> +<connect gate="G$1" pin="ROMCLK" pad="P$26"/> +<connect gate="G$1" pin="ROMDIS" pad="P$3"/> +<connect gate="G$1" pin="SBY" pad="P$8"/> +<connect gate="G$1" pin="SE" pad="P$19"/> +<connect gate="G$1" pin="SERIN" pad="P$21"/> +<connect gate="G$1" pin="SEROUT" pad="P$12"/> +<connect gate="G$1" pin="TEST" pad="P$22"/> +<connect gate="G$1" pin="VD1" pad="P$23"/> +<connect gate="G$1" pin="VDD" pad="P$7"/> +<connect gate="G$1" pin="VSS" pad="P$1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="CTS256A-AL2" prefix="U"> +<gates> +<gate name="G$1" symbol="CTS256AL2" x="0" y="22.86"/> +</gates> +<devices> +<device name="" package="DIL40-6"> +<connects> +<connect gate="G$1" pin="A0" pad="P$6"/> +<connect gate="G$1" pin="A1" pad="P$7"/> +<connect gate="G$1" pin="A2" pad="P$8"/> +<connect gate="G$1" pin="A3" pad="P$9"/> +<connect gate="G$1" pin="A4" pad="P$10"/> +<connect gate="G$1" pin="A5/RXD" pad="P$16"/> +<connect gate="G$1" pin="A6/SCLK" pad="P$15"/> +<connect gate="G$1" pin="A7" pad="P$11"/> +<connect gate="G$1" pin="B1" pad="P$4"/> +<connect gate="G$1" pin="B2" pad="P$5"/> +<connect gate="G$1" pin="B3/TXD" pad="P$37"/> +<connect gate="G$1" pin="B4/ALATCH" pad="P$38"/> +<connect gate="G$1" pin="B5/R/W" pad="P$1"/> +<connect gate="G$1" pin="B6/ENABLE" pad="P$39"/> +<connect gate="G$1" pin="B7/CLOCKOUT" pad="P$2"/> +<connect gate="G$1" pin="BO" pad="P$3"/> +<connect gate="G$1" pin="C0" pad="P$28"/> +<connect gate="G$1" pin="C1" pad="P$29"/> +<connect gate="G$1" pin="C2" pad="P$30"/> +<connect gate="G$1" pin="C3" pad="P$31"/> +<connect gate="G$1" pin="C4" pad="P$32"/> +<connect gate="G$1" pin="C5" pad="P$33"/> +<connect gate="G$1" pin="C6" pad="P$34"/> +<connect gate="G$1" pin="C7" pad="P$35"/> +<connect gate="G$1" pin="D1" pad="P$26"/> +<connect gate="G$1" pin="D2" pad="P$24"/> +<connect gate="G$1" pin="D3" pad="P$23"/> +<connect gate="G$1" pin="D4" pad="P$22"/> +<connect gate="G$1" pin="D5" pad="P$21"/> +<connect gate="G$1" pin="D6" pad="P$20"/> +<connect gate="G$1" pin="D7" pad="P$19"/> +<connect gate="G$1" pin="DO" pad="P$27"/> +<connect gate="G$1" pin="INT1" pad="P$13"/> +<connect gate="G$1" pin="INT3" pad="P$12"/> +<connect gate="G$1" pin="MC" pad="P$36"/> +<connect gate="G$1" pin="RESET" pad="P$14"/> +<connect gate="G$1" pin="VCC" pad="P$25"/> +<connect gate="G$1" pin="VSS" pad="P$40"/> +<connect gate="G$1" pin="XTAL1" pad="P$18"/> +<connect gate="G$1" pin="XTAL2/CLOCKIN" pad="P$17"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> |