diff options
Diffstat (limited to 'eagle/lbr/ftdi')
| -rwxr-xr-x | eagle/lbr/ftdi/ftdichip-6.lbr | 1815 |
1 files changed, 1815 insertions, 0 deletions
diff --git a/eagle/lbr/ftdi/ftdichip-6.lbr b/eagle/lbr/ftdi/ftdichip-6.lbr new file mode 100755 index 0000000..5bceac5 --- /dev/null +++ b/eagle/lbr/ftdi/ftdichip-6.lbr @@ -0,0 +1,1815 @@ +<?xml version="1.0" encoding="utf-8"?> +<!DOCTYPE eagle SYSTEM "eagle.dtd"> +<eagle version="7.3.0"> +<drawing> +<settings> +<setting alwaysvectorfont="no"/> +<setting verticaltext="up"/> +</settings> +<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/> +<layers> +<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/> +<layer number="2" name="Route2" color="1" fill="3" visible="no" active="yes"/> +<layer number="3" name="Route3" color="4" fill="3" visible="no" active="yes"/> +<layer number="4" name="Route4" color="1" fill="4" visible="no" active="yes"/> +<layer number="5" name="Route5" color="4" fill="4" visible="no" active="yes"/> +<layer number="6" name="Route6" color="1" fill="8" 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active="yes"/> +<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/> +<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/> +<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/> +<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="yes"/> +<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="yes"/> +<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="yes"/> +<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="yes"/> +<layer number="26" name="bNames" color="7" fill="1" visible="no" active="yes"/> +<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="yes"/> +<layer number="28" name="bValues" color="7" fill="1" visible="no" active="yes"/> +<layer number="29" name="tStop" color="7" fill="3" visible="no" active="yes"/> +<layer number="30" name="bStop" color="7" fill="6" visible="no" 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active="yes"/> +<layer number="43" name="vRestrict" color="2" fill="10" visible="yes" active="yes"/> +<layer number="44" name="Drills" color="7" fill="1" visible="no" active="yes"/> +<layer number="45" name="Holes" color="7" fill="1" visible="no" active="yes"/> +<layer number="46" name="Milling" color="3" fill="1" visible="no" active="yes"/> +<layer number="47" name="Measures" color="7" fill="1" visible="no" active="yes"/> +<layer number="48" name="Document" color="7" fill="1" visible="yes" active="yes"/> +<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="yes"/> +<layer number="50" name="dxf" color="7" fill="1" visible="no" active="yes"/> +<layer number="51" name="tDocu" color="8" fill="1" visible="yes" active="yes"/> +<layer number="52" name="bDocu" color="8" fill="1" visible="no" active="yes"/> +<layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/> +<layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/> +<layer number="93" name="Pins" color="2" fill="1" visible="yes" active="yes"/> +<layer number="94" name="Symbols" color="4" fill="1" visible="yes" active="yes"/> +<layer number="95" name="Names" color="7" fill="1" visible="yes" active="yes"/> +<layer number="96" name="Values" color="7" fill="1" visible="yes" active="yes"/> +<layer number="97" name="Info" color="7" fill="1" visible="yes" active="yes"/> +<layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> +<layer number="250" name="Descript" color="3" fill="1" visible="no" active="no"/> +<layer number="251" name="SMDround" color="12" fill="11" visible="no" active="no"/> +<layer number="254" name="cooling" color="7" fill="1" visible="yes" active="yes"/> +</layers> +<library> +<description><b>USB-Controller from Future Technology Devices International Ltd.</b> +<br><br> +Based on the source of the libraries ftdichip-4.lbr and ftdichip-2.lbr.<br> +With new Vinculum-II Chips.<br> + +Includes the following controller:<br> +<ul> +<li>FT232BL , FT245BL (2nd generation) +<li>FT2232L (3rd generation) +<li>FT232RL , FT245RL (4th generation) +<li>FT4232HL (5th generation) +<li>VNC1L +<li>VNC2-32 +<li>VNC2-48 (symbol compatible<sup>*</sup> with VNC1L) +<li>VNC2-64 +</ul> +http://www.ftdichip.com + +<br><br> + +Originally by: +<ul> +<li>B.Redemann, 4232 by R.Pearce (ftdichip-4.lbr) +<li>Paul Carpenter, PC Services www.pcserviceselectronics.co.uk (ftdichip-2.lbr) +</ul> +Updated with Vinculum-II by Marcin Zakaszewski.</description> +<packages> +<package name="LQFP32"> +<description><b>LQFP-32 package</b><p> +7x7 mm case, 0.8 mm lead pitch</description> +<wire x1="-3.5" y1="3.5" x2="3.5" y2="3.5" width="0.127" layer="21"/> +<wire x1="3.5" y1="3.5" x2="3.5" y2="-3.5" width="0.127" layer="21"/> +<wire x1="-3.5" y1="3.5" x2="-3.5" y2="-3.5" width="0.127" layer="21"/> +<wire x1="-3.5" y1="-3.5" x2="3.5" y2="-3.5" width="0.127" layer="21"/> +<circle x="-2.5" y="-2.5" radius="0.2236" width="0.6096" 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length="middle" direction="pwr" rot="R270"/> +</symbol> +<symbol name="4232CORE"> +<wire x1="20.32" y1="40.64" x2="-25.4" y2="40.64" width="0.254" layer="94"/> +<wire x1="-25.4" y1="40.64" x2="-25.4" y2="-25.4" width="0.254" layer="94"/> +<wire x1="-25.4" y1="-25.4" x2="20.32" y2="-25.4" width="0.254" layer="94"/> +<wire x1="20.32" y1="-25.4" x2="20.32" y2="40.64" width="0.254" layer="94"/> +<text x="15.24" y="-27.94" size="1.4224" layer="95">>NAME</text> +<text x="-10.16" y="10.16" size="1.4224" layer="96">>VALUE</text> +<pin name="SUSPEND#" x="25.4" y="22.86" length="middle" direction="out" function="dot" rot="R180"/> +<pin name="PWREN#" x="25.4" y="17.78" length="middle" direction="out" function="dot" rot="R180"/> +<pin name="GND@6" x="5.08" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@5" x="2.54" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@4" x="0" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@3" x="-2.54" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="AGND" x="-15.24" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="VCCIO@2" x="10.16" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@1" x="7.62" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCORE@3" x="-12.7" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCORE@2" x="-15.24" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VPLL" x="-5.08" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VREGIN" x="-30.48" y="22.86" length="middle"/> +<pin name="USBDM" x="-30.48" y="-5.08" length="middle" direction="in"/> +<pin name="USBDP" x="-30.48" y="-7.62" length="middle" direction="in"/> +<pin name="REF" x="-30.48" y="7.62" length="middle" direction="in"/> +<pin name="RESET#" x="-30.48" y="12.7" length="middle" direction="in" function="dot"/> +<pin name="XTIN" x="25.4" y="-17.78" length="middle" direction="in" rot="R180"/> +<pin name="XTOUT" x="25.4" y="-7.62" length="middle" direction="out" rot="R180"/> +<pin name="EECS" x="25.4" y="7.62" length="middle" rot="R180"/> +<pin name="EECLK" x="25.4" y="5.08" length="middle" direction="out" rot="R180"/> +<pin name="EEDATA" x="25.4" y="2.54" length="middle" rot="R180"/> +<pin name="TEST" x="-30.48" y="-15.24" length="middle" direction="in"/> +<pin name="GND@2" x="-5.08" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@1" x="-7.62" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@7" x="7.62" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@8" x="10.16" y="-30.48" length="middle" direction="pwr" rot="R90"/> +<pin name="VCCIO@3" x="12.7" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@4" x="15.24" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCORE@1" x="-17.78" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VPHY" x="0" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VREGOUT" x="-30.48" y="27.94" length="middle" direction="out"/> +</symbol> +<symbol name="4232PORT"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.4224" layer="95">>NAME</text> +<pin name="DB0/TXD" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="DB1/RXD" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="DB2/RTS" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="DB3/CTS" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="DB4/DTR" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="DB5/DSR" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="DB6/DCD" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="DB7/RI" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC1L"> +<wire x1="-15.24" y1="35.56" x2="15.24" y2="35.56" width="0.254" layer="94"/> +<wire x1="15.24" y1="35.56" x2="15.24" y2="-45.72" width="0.254" layer="94"/> +<wire x1="15.24" y1="-45.72" x2="-15.24" y2="-45.72" width="0.254" layer="94"/> +<wire x1="-15.24" y1="-45.72" x2="-15.24" y2="35.56" width="0.254" layer="94"/> +<text x="5.08" y="38.1" size="1.778" layer="95">>NAME</text> +<text x="5.08" y="-48.26" size="1.778" layer="95">>VALUE</text> +<pin name="VCCIO@1" x="-12.7" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@2" x="-10.16" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@3" x="-7.62" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCC" x="-2.54" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="AVCC" x="0" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="ADBUS0" x="20.32" y="33.02" length="middle" rot="R180"/> +<pin name="ADBUS1" x="20.32" y="30.48" length="middle" rot="R180"/> +<pin name="ADBUS2" x="20.32" y="27.94" length="middle" rot="R180"/> +<pin name="ADBUS3" x="20.32" y="25.4" length="middle" rot="R180"/> +<pin name="ADBUS4" x="20.32" y="22.86" length="middle" rot="R180"/> +<pin name="ADBUS5" x="20.32" y="20.32" length="middle" rot="R180"/> +<pin name="ADBUS6" x="20.32" y="17.78" length="middle" rot="R180"/> +<pin name="ADBUS7" x="20.32" y="15.24" length="middle" rot="R180"/> +<pin name="ACBUS0" x="20.32" y="10.16" length="middle" rot="R180"/> +<pin name="ACBUS1" x="20.32" y="7.62" length="middle" rot="R180"/> +<pin name="ACBUS2" x="20.32" y="5.08" length="middle" rot="R180"/> +<pin name="ACBUS3" x="20.32" y="2.54" length="middle" rot="R180"/> +<pin name="ACBUS4" x="20.32" y="0" length="middle" rot="R180"/> +<pin name="ACBUS5" x="20.32" y="-2.54" length="middle" rot="R180"/> +<pin name="ACBUS6" x="20.32" y="-5.08" length="middle" rot="R180"/> +<pin name="ACBUS7" x="20.32" y="-7.62" length="middle" rot="R180"/> +<pin name="BDBUS0" x="20.32" y="-12.7" length="middle" rot="R180"/> +<pin name="BDBUS1" x="20.32" y="-15.24" length="middle" rot="R180"/> +<pin name="BDBUS2" x="20.32" y="-17.78" length="middle" rot="R180"/> +<pin name="BDBUS3" x="20.32" y="-20.32" length="middle" rot="R180"/> +<pin name="BDBUS4" x="20.32" y="-22.86" length="middle" rot="R180"/> +<pin name="BDBUS5" x="20.32" y="-25.4" length="middle" rot="R180"/> +<pin name="BDBUS6" x="20.32" y="-27.94" length="middle" rot="R180"/> +<pin name="BDBUS7" x="20.32" y="-30.48" length="middle" rot="R180"/> +<pin name="BCBUS0" x="20.32" y="-35.56" length="middle" rot="R180"/> +<pin name="BCBUS1" x="20.32" y="-38.1" length="middle" rot="R180"/> +<pin name="BCBUS2" x="20.32" y="-40.64" length="middle" rot="R180"/> +<pin name="BCBUS3" x="20.32" y="-43.18" length="middle" rot="R180"/> +<pin name="USB1DM" x="-20.32" y="20.32" length="middle"/> +<pin name="USB1DP" x="-20.32" y="17.78" length="middle"/> +<pin name="USB2DM" x="-20.32" y="15.24" length="middle"/> +<pin name="USB2DP" x="-20.32" y="12.7" length="middle"/> +<pin name="XTIN" x="-20.32" y="5.08" length="middle" direction="in"/> +<pin name="XTOUT" x="-20.32" y="0" length="middle" direction="out"/> +<pin name="RESET#" x="-20.32" y="-7.62" length="middle" direction="in" function="dot"/> +<pin name="PROG#" x="-20.32" y="-12.7" length="middle" direction="in" function="dot"/> +<pin name="PLLFLTR" x="-20.32" y="-20.32" length="middle" direction="in"/> +<pin name="TEST" x="-20.32" y="-25.4" length="middle" direction="in"/> +<pin name="AGND" x="-12.7" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@1" x="-7.62" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@2" x="-5.08" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@3" x="-2.54" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@4" x="0" y="-50.8" length="middle" direction="pwr" rot="R90"/> +</symbol> +<symbol name="VNC2-32"> +<wire x1="-15.24" y1="40.64" x2="15.24" y2="40.64" width="0.254" layer="94"/> +<wire x1="15.24" y1="40.64" x2="15.24" y2="-40.64" width="0.254" layer="94"/> +<wire x1="15.24" y1="-40.64" x2="-15.24" y2="-40.64" width="0.254" layer="94"/> +<wire x1="-15.24" y1="-40.64" x2="-15.24" y2="40.64" width="0.254" layer="94"/> +<text x="5.08" y="43.18" size="1.778" layer="95">>NAME</text> +<text x="5.08" y="-43.18" size="1.778" layer="95">>VALUE</text> +<pin name="VCCIO@1" x="-12.7" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@2" x="-10.16" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@3" x="-7.62" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VREG_IN" x="-2.54" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCPLL_IN" x="0" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="IOBUS0" x="20.32" y="27.94" length="middle" rot="R180"/> +<pin name="IOBUS1" x="20.32" y="22.86" length="middle" rot="R180"/> +<pin name="IOBUS2" x="20.32" y="17.78" length="middle" rot="R180"/> +<pin name="IOBUS3" x="20.32" y="12.7" length="middle" rot="R180"/> +<pin name="IOBUS4" x="20.32" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS5" x="20.32" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS6" x="20.32" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS7" x="20.32" y="-7.62" length="middle" rot="R180"/> +<pin name="IOBUS8" x="20.32" y="-12.7" length="middle" rot="R180"/> +<pin name="IOBUS9" x="20.32" y="-17.78" length="middle" rot="R180"/> +<pin name="IOBUS10" x="20.32" y="-22.86" length="middle" rot="R180"/> +<pin name="IOBUS11" x="20.32" y="-27.94" length="middle" rot="R180"/> +<pin name="USB1DM" x="-20.32" y="15.24" length="middle"/> +<pin name="USB1DP" x="-20.32" y="12.7" length="middle"/> +<pin name="USB2DM" x="-20.32" y="10.16" length="middle"/> +<pin name="USB2DP" x="-20.32" y="7.62" length="middle"/> +<pin name="XTIN" x="-20.32" y="0" length="middle" direction="in"/> +<pin name="XTOUT" x="-20.32" y="-7.62" length="middle" direction="out"/> +<pin name="RESET#" x="-20.32" y="-15.24" length="middle" direction="in" function="dot"/> +<pin name="PROG#" x="-20.32" y="-20.32" length="middle" direction="in" function="dot"/> +<pin name="VREG_OUT" x="-20.32" y="22.86" length="middle" direction="out"/> +<pin name="TEST" x="-20.32" y="-27.94" length="middle" direction="in"/> +<pin name="GND@1" x="-10.16" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GNDPLL" x="-7.62" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@2" x="-5.08" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@3" x="-2.54" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@4" x="0" y="-45.72" length="middle" direction="pwr" rot="R90"/> +</symbol> +<symbol name="VNC2-48"> +<wire x1="-15.24" y1="35.56" x2="15.24" y2="35.56" width="0.254" layer="94"/> +<wire x1="15.24" y1="35.56" x2="15.24" y2="-45.72" width="0.254" layer="94"/> +<wire x1="15.24" y1="-45.72" x2="-15.24" y2="-45.72" width="0.254" layer="94"/> +<wire x1="-15.24" y1="-45.72" x2="-15.24" y2="35.56" width="0.254" layer="94"/> +<text x="5.08" y="38.1" size="1.778" layer="95">>NAME</text> +<text x="5.08" y="-48.26" size="1.778" layer="95">>VALUE</text> +<pin name="VCCIO@1" x="-12.7" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@2" x="-10.16" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@3" x="-7.62" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VREG_IN" x="-2.54" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCPLL_IN" x="0" y="40.64" length="middle" direction="pwr" rot="R270"/> +<pin name="IOBUS12" x="20.32" y="33.02" length="middle" rot="R180"/> +<pin name="IOBUS13" x="20.32" y="30.48" length="middle" rot="R180"/> +<pin name="IOBUS14" x="20.32" y="27.94" length="middle" rot="R180"/> +<pin name="IOBUS15" x="20.32" y="25.4" length="middle" rot="R180"/> +<pin name="IOBUS16" x="20.32" y="22.86" length="middle" rot="R180"/> +<pin name="IOBUS17" x="20.32" y="20.32" length="middle" rot="R180"/> +<pin name="IOBUS18" x="20.32" y="17.78" length="middle" rot="R180"/> +<pin name="IOBUS19" x="20.32" y="15.24" length="middle" rot="R180"/> +<pin name="IOBUS20" x="20.32" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS21" x="20.32" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS22" x="20.32" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS23" x="20.32" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS24" x="20.32" y="0" length="middle" rot="R180"/> +<pin name="IOBUS25" x="20.32" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS26" x="20.32" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS27" x="20.32" y="-7.62" length="middle" rot="R180"/> +<pin name="IOBUS0" x="20.32" y="-12.7" length="middle" rot="R180"/> +<pin name="IOBUS1" x="20.32" y="-15.24" length="middle" rot="R180"/> +<pin name="IOBUS2" x="20.32" y="-17.78" length="middle" rot="R180"/> +<pin name="IOBUS3" x="20.32" y="-20.32" length="middle" rot="R180"/> +<pin name="IOBUS4" x="20.32" y="-22.86" length="middle" rot="R180"/> +<pin name="IOBUS5" x="20.32" y="-25.4" length="middle" rot="R180"/> +<pin name="IOBUS6" x="20.32" y="-27.94" length="middle" rot="R180"/> +<pin name="IOBUS7" x="20.32" y="-30.48" length="middle" rot="R180"/> +<pin name="IOBUS8" x="20.32" y="-35.56" length="middle" rot="R180"/> +<pin name="IOBUS9" x="20.32" y="-38.1" length="middle" rot="R180"/> +<pin name="IOBUS10" x="20.32" y="-40.64" length="middle" rot="R180"/> +<pin name="IOBUS11" x="20.32" y="-43.18" length="middle" rot="R180"/> +<pin name="USB1DM" x="-20.32" y="20.32" length="middle"/> +<pin name="USB1DP" x="-20.32" y="17.78" length="middle"/> +<pin name="USB2DM" x="-20.32" y="15.24" length="middle"/> +<pin name="USB2DP" x="-20.32" y="12.7" length="middle"/> +<pin name="XTIN" x="-20.32" y="5.08" length="middle" direction="in"/> +<pin name="XTOUT" x="-20.32" y="0" length="middle" direction="out"/> +<pin name="RESET#" x="-20.32" y="-7.62" length="middle" direction="in" function="dot"/> +<pin name="PROG#" x="-20.32" y="-12.7" length="middle" direction="in" function="dot"/> +<pin name="VREG_OUT" x="-20.32" y="-20.32" length="middle" direction="out"/> +<pin name="TEST" x="-20.32" y="-25.4" length="middle" direction="in"/> +<pin name="GNDPLL" x="-12.7" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@1" x="-7.62" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@2" x="-5.08" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@3" x="-2.54" y="-50.8" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@4" x="0" y="-50.8" length="middle" direction="pwr" rot="R90"/> +</symbol> +<symbol name="VNC2-64CORE"> +<wire x1="-15.24" y1="40.64" x2="15.24" y2="40.64" width="0.254" layer="94"/> +<wire x1="15.24" y1="40.64" x2="15.24" y2="-40.64" width="0.254" layer="94"/> +<wire x1="15.24" y1="-40.64" x2="-15.24" y2="-40.64" width="0.254" layer="94"/> +<wire x1="-15.24" y1="-40.64" x2="-15.24" y2="40.64" width="0.254" layer="94"/> +<text x="5.08" y="43.18" size="1.778" layer="95">>NAME</text> +<text x="5.08" y="-43.18" size="1.778" layer="95">>VALUE</text> +<pin name="VCCIO@1" x="-12.7" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@2" x="-10.16" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO@3" x="-7.62" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VREG_IN" x="-2.54" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCPLL_IN" x="0" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="USB1DM" x="-20.32" y="15.24" length="middle"/> +<pin name="USB1DP" x="-20.32" y="12.7" length="middle"/> +<pin name="USB2DM" x="-20.32" y="10.16" length="middle"/> +<pin name="USB2DP" x="-20.32" y="7.62" length="middle"/> +<pin name="XTIN" x="-20.32" y="0" length="middle" direction="in"/> +<pin name="XTOUT" x="-20.32" y="-7.62" length="middle" direction="out"/> +<pin name="RESET#" x="-20.32" y="-15.24" length="middle" direction="in" function="dot"/> +<pin name="PROG#" x="-20.32" y="-20.32" length="middle" direction="in" function="dot"/> +<pin name="VREG_OUT" x="-20.32" y="22.86" length="middle" direction="out"/> +<pin name="TEST" x="-20.32" y="-27.94" length="middle" direction="in"/> +<pin name="GND@1" x="-10.16" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GNDPLL" x="-7.62" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@2" x="-5.08" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@3" x="-2.54" y="-45.72" length="middle" direction="pwr" rot="R90"/> +<pin name="GND@4" x="0" y="-45.72" length="middle" direction="pwr" rot="R90"/> +</symbol> +<symbol name="VNC2-64PORT1"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS0" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS1" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS2" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS3" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS4" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS5" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS6" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS7" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC2-64PORT2"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS8" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS9" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS10" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS11" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS12" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS13" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS14" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS15" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC2-64PORT3"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS16" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS17" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS18" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS19" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS20" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS21" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS22" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS23" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC2-64PORT4"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS24" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS25" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS26" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS27" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS28" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS29" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS30" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS31" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC2-64PORT5"> +<wire x1="7.62" y1="12.7" x2="-7.62" y2="12.7" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-10.16" x2="7.62" y2="-10.16" width="0.254" layer="94"/> +<wire x1="7.62" y1="-10.16" x2="7.62" y2="12.7" width="0.254" layer="94"/> +<text x="-7.62" y="13.6525" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS32" x="12.7" y="10.16" length="middle" rot="R180"/> +<pin name="IOBUS33" x="12.7" y="7.62" length="middle" rot="R180"/> +<pin name="IOBUS34" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS35" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS36" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS37" x="12.7" y="-2.54" length="middle" rot="R180"/> +<pin name="IOBUS38" x="12.7" y="-5.08" length="middle" rot="R180"/> +<pin name="IOBUS39" x="12.7" y="-7.62" length="middle" rot="R180"/> +</symbol> +<symbol name="VNC2-64PORT6"> +<wire x1="7.62" y1="7.62" x2="-7.62" y2="7.62" width="0.254" layer="94"/> +<wire x1="-7.62" y1="-5.08" x2="7.62" y2="-5.08" width="0.254" layer="94"/> +<wire x1="7.62" y1="-5.08" x2="7.62" y2="7.62" width="0.254" layer="94"/> +<text x="-7.62" y="8.5725" size="1.778" layer="95">>NAME</text> +<pin name="IOBUS40" x="12.7" y="5.08" length="middle" rot="R180"/> +<pin name="IOBUS41" x="12.7" y="2.54" length="middle" rot="R180"/> +<pin name="IOBUS42" x="12.7" y="0" length="middle" rot="R180"/> +<pin name="IOBUS43" x="12.7" y="-2.54" length="middle" rot="R180"/> +</symbol> +<symbol name="FT232H"> +<description>FTDI FT232H High Speed USB 2.0 Slave Controller</description> +<wire x1="-40.64" y1="40.64" x2="40.64" y2="40.64" width="0.254" layer="94"/> +<wire x1="40.64" y1="40.64" x2="40.64" y2="-43.18" width="0.254" layer="94"/> +<wire x1="40.64" y1="-43.18" x2="-40.64" y2="-43.18" width="0.254" layer="94"/> +<wire x1="-40.64" y1="-43.18" x2="-40.64" y2="40.64" width="0.254" layer="94"/> +<text x="-40.64" y="40.64" size="1.778" layer="95">>NAME</text> +<text x="-40.64" y="-45.72" size="1.778" layer="96">>VALUE</text> +<pin name="VREGIN" x="-45.72" y="35.56" length="middle" direction="pwr"/> +<pin name="VCCD" x="-45.72" y="25.4" length="middle" direction="pwr"/> +<pin name="VCCCORE" x="-45.72" y="20.32" length="middle" direction="pwr"/> +<pin name="VCCA" x="-45.72" y="15.24" length="middle" direction="pwr"/> +<pin name="VPHY" x="-25.4" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VPLL" x="-20.32" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO1" x="-15.24" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO2" x="-10.16" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="VCCIO3" x="-5.08" y="45.72" length="middle" direction="pwr" rot="R270"/> +<pin name="AGND1" x="-27.94" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="AGND2" x="-22.86" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="AGND3" x="-17.78" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND1" x="-12.7" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND2" x="-7.62" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND3" x="-2.54" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND4" x="2.54" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND5" x="7.62" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND6" x="12.7" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND7" x="17.78" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="GND8" x="22.86" y="-48.26" length="middle" direction="pwr" rot="R90"/> +<pin name="DP" x="-45.72" y="7.62" length="middle"/> +<pin name="DM" x="-45.72" y="2.54" length="middle" function="dot"/> +<pin name="RESET#" x="-45.72" y="-5.08" length="middle"/> +<pin name="REF" x="-45.72" y="-10.16" length="middle"/> +<pin name="EECS" x="-45.72" y="-20.32" length="middle"/> +<pin name="EECLK" x="-45.72" y="-25.4" length="middle"/> +<pin name="EEDATA" x="-45.72" y="-30.48" length="middle"/> +<pin name="TEST" x="-45.72" y="-38.1" length="middle"/> +<pin name="XCSI" x="10.16" y="45.72" length="middle" rot="R270"/> +<pin name="XCSO" x="17.78" y="45.72" length="middle" rot="R270"/> +<pin name="ADBUS0" x="45.72" y="35.56" length="middle" rot="R180"/> +<pin name="ADBUS1" x="45.72" y="33.02" length="middle" rot="R180"/> +<pin name="ADBUS2" x="45.72" y="30.48" length="middle" rot="R180"/> +<pin name="ADBUS3" x="45.72" y="27.94" length="middle" rot="R180"/> +<pin name="ADBUS4" x="45.72" y="25.4" length="middle" rot="R180"/> +<pin name="ADBUS5" x="45.72" y="22.86" length="middle" rot="R180"/> +<pin name="ADBUS6" x="45.72" y="20.32" length="middle" rot="R180"/> +<pin name="ADBUS7" x="45.72" y="17.78" length="middle" rot="R180"/> +<pin name="ACBUS0" x="45.72" y="7.62" length="middle" rot="R180"/> +<pin name="ACBUS1" x="45.72" y="5.08" length="middle" rot="R180"/> +<pin name="ACBUS2" x="45.72" y="2.54" length="middle" rot="R180"/> +<pin name="ACBUS3" x="45.72" y="0" length="middle" rot="R180"/> +<pin name="ACBUS4" x="45.72" y="-2.54" length="middle" rot="R180"/> +<pin name="ACBUS5" x="45.72" y="-5.08" length="middle" rot="R180"/> +<pin name="ACBUS6" x="45.72" y="-7.62" length="middle" rot="R180"/> +<pin name="ACBUS7" x="45.72" y="-10.16" length="middle" rot="R180"/> +<pin name="ACBUS8" x="45.72" y="-12.7" length="middle" rot="R180"/> +<pin name="ACBUS9" x="45.72" y="-15.24" length="middle" rot="R180"/> +</symbol> +</symbols> +<devicesets> +<deviceset name="FT232BL" prefix="U"> +<description><b>USB UART</b> +<p> +2<sup>nd</sup> Generation USB UART (USB &lt;-&gt; Serial) Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT232BL" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LQFP32"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="6"/> +<connect gate="G$1" pin="AGND" pad="29"/> +<connect gate="G$1" pin="AVCC" pad="30"/> +<connect gate="G$1" pin="CTS#" pad="22"/> +<connect gate="G$1" pin="DCD#" pad="19"/> +<connect gate="G$1" pin="DSR#" pad="20"/> +<connect gate="G$1" pin="DTR#" pad="21"/> +<connect gate="G$1" pin="EECS" pad="32"/> +<connect gate="G$1" pin="EEDATA" pad="2"/> +<connect gate="G$1" pin="EESK" pad="1"/> +<connect gate="G$1" pin="GND1" pad="9"/> +<connect gate="G$1" pin="GND2" pad="17"/> +<connect gate="G$1" pin="PWRCTL" pad="14"/> +<connect gate="G$1" pin="PWREN#" pad="15"/> +<connect gate="G$1" pin="RESET#" pad="4"/> +<connect gate="G$1" pin="RI#" pad="18"/> +<connect gate="G$1" pin="RSTOUT#" pad="5"/> +<connect gate="G$1" pin="RTS#" pad="23"/> +<connect gate="G$1" pin="RXD" pad="24"/> +<connect gate="G$1" pin="RXLED#" pad="11"/> +<connect gate="G$1" pin="SLEEP#" pad="10"/> +<connect gate="G$1" pin="TEST" pad="31"/> +<connect gate="G$1" pin="TXD" pad="25"/> +<connect gate="G$1" pin="TXDEN" pad="16"/> +<connect gate="G$1" pin="TXLED#" pad="12"/> +<connect gate="G$1" pin="USBDM" pad="8"/> +<connect gate="G$1" pin="USBDP" pad="7"/> +<connect gate="G$1" pin="VCC1" pad="3"/> +<connect gate="G$1" pin="VCC2" pad="26"/> +<connect gate="G$1" pin="VCCIO" pad="13"/> +<connect gate="G$1" pin="XTIN" pad="27"/> +<connect gate="G$1" pin="XTOUT" pad="28"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT245BL" prefix="U" uservalue="yes"> +<description><b>USB FIFO</b> +<p> +2<sup>nd</sup> Generation USB FIFO (USB &lt;-&gt; Parallel) Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT232BL" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LQFP32"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="6"/> +<connect gate="G$1" pin="AGND" pad="29"/> +<connect gate="G$1" pin="AVCC" pad="30"/> +<connect gate="G$1" pin="CTS#" pad="22"/> +<connect gate="G$1" pin="DCD#" pad="19"/> +<connect gate="G$1" pin="DSR#" pad="20"/> +<connect gate="G$1" pin="DTR#" pad="21"/> +<connect gate="G$1" pin="EECS" pad="32"/> +<connect gate="G$1" pin="EEDATA" pad="2"/> +<connect gate="G$1" pin="EESK" pad="1"/> +<connect gate="G$1" pin="GND1" pad="9"/> +<connect gate="G$1" pin="GND2" pad="17"/> +<connect gate="G$1" pin="PWRCTL" pad="14"/> +<connect gate="G$1" pin="PWREN#" pad="15"/> +<connect gate="G$1" pin="RESET#" pad="4"/> +<connect gate="G$1" pin="RI#" pad="18"/> +<connect gate="G$1" pin="RSTOUT#" pad="5"/> +<connect gate="G$1" pin="RTS#" pad="23"/> +<connect gate="G$1" pin="RXD" pad="24"/> +<connect gate="G$1" pin="RXLED#" pad="11"/> +<connect gate="G$1" pin="SLEEP#" pad="10"/> +<connect gate="G$1" pin="TEST" pad="31"/> +<connect gate="G$1" pin="TXD" pad="25"/> +<connect gate="G$1" pin="TXDEN" pad="16"/> +<connect gate="G$1" pin="TXLED#" pad="12"/> +<connect gate="G$1" pin="USBDM" pad="8"/> +<connect gate="G$1" pin="USBDP" pad="7"/> +<connect gate="G$1" pin="VCC1" pad="3"/> +<connect gate="G$1" pin="VCC2" pad="26"/> +<connect gate="G$1" pin="VCCIO" pad="13"/> +<connect gate="G$1" pin="XTIN" pad="27"/> +<connect gate="G$1" pin="XTOUT" pad="28"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT2232L" prefix="U" uservalue="yes"> +<description><b>USB UART / FIFO Controller</b> +<p> +3<sup>nd</sup> Generation USB Double-UART (USB &lt;-&gt; Serial) - FIFO Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT2232C" x="-7.62" y="12.7"/> +</gates> +<devices> +<device name="" package="LQFP48"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="6"/> +<connect gate="G$1" pin="ACBUS0" pad="15"/> +<connect gate="G$1" pin="ACBUS1" pad="13"/> +<connect gate="G$1" pin="ACBUS2" pad="12"/> +<connect gate="G$1" pin="ACBUS3" pad="11"/> +<connect gate="G$1" pin="ADBUS0" pad="24"/> +<connect gate="G$1" pin="ADBUS1" pad="23"/> +<connect gate="G$1" pin="ADBUS2" pad="22"/> +<connect gate="G$1" pin="ADBUS3" pad="21"/> +<connect gate="G$1" pin="ADBUS4" pad="20"/> +<connect gate="G$1" pin="ADBUS5" pad="19"/> +<connect gate="G$1" pin="ADBUS6" pad="17"/> +<connect gate="G$1" pin="ADBUS7" pad="16"/> +<connect gate="G$1" pin="AGND" pad="45"/> +<connect gate="G$1" pin="AVVC" pad="46"/> +<connect gate="G$1" pin="BCBUS0" pad="30"/> +<connect gate="G$1" pin="BCBUS1" pad="29"/> +<connect gate="G$1" pin="BCBUS2" pad="28"/> +<connect gate="G$1" pin="BCBUS3" pad="27"/> +<connect gate="G$1" pin="BDBUS0" pad="40"/> +<connect gate="G$1" pin="BDBUS1" pad="39"/> +<connect gate="G$1" pin="BDBUS2" pad="38"/> +<connect gate="G$1" pin="BDBUS3" pad="37"/> +<connect gate="G$1" pin="BDBUS4" pad="36"/> +<connect gate="G$1" pin="BDBUS5" pad="35"/> +<connect gate="G$1" pin="BDBUS6" pad="33"/> +<connect gate="G$1" pin="BDBUS7" pad="32"/> +<connect gate="G$1" pin="EECS" pad="48"/> +<connect gate="G$1" pin="EEDATA" pad="2"/> +<connect gate="G$1" pin="EESK" pad="1"/> +<connect gate="G$1" pin="GND0" pad="9"/> +<connect gate="G$1" pin="GND1" pad="18"/> +<connect gate="G$1" pin="GND2" pad="25"/> +<connect gate="G$1" pin="GND3" pad="34"/> +<connect gate="G$1" pin="PWREN#" pad="41"/> +<connect gate="G$1" pin="RESET#" pad="4"/> +<connect gate="G$1" pin="RSTOUT#" pad="5"/> +<connect gate="G$1" pin="SI/WUA" pad="10"/> +<connect gate="G$1" pin="SI/WUB" pad="26"/> +<connect gate="G$1" pin="TEST" pad="47"/> +<connect gate="G$1" pin="USBDM" pad="8"/> +<connect gate="G$1" pin="USBDP" pad="7"/> +<connect gate="G$1" pin="VCC0" pad="3"/> +<connect gate="G$1" pin="VCC1" pad="42"/> +<connect gate="G$1" pin="VCCIOA" pad="14"/> +<connect gate="G$1" pin="VCCIOB" pad="31"/> +<connect gate="G$1" pin="XTIN" pad="43"/> +<connect gate="G$1" pin="XTOUT" pad="44"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT232RL" prefix="U" uservalue="yes"> +<description><b>USB UART</b> +<p> +4<sup>th</sup> Generation USB UART (USB &lt;-&gt; Serial) Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT232R" x="0" y="0"/> +</gates> +<devices> +<device name="" package="SSOP28DB"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="17"/> +<connect gate="G$1" pin="AGND" pad="25"/> +<connect gate="G$1" pin="CBUS0" pad="23"/> +<connect gate="G$1" pin="CBUS1" pad="22"/> +<connect gate="G$1" pin="CBUS2" pad="13"/> +<connect gate="G$1" pin="CBUS3" pad="14"/> +<connect gate="G$1" pin="CBUS4" pad="12"/> +<connect gate="G$1" pin="CTS#" pad="11"/> +<connect gate="G$1" pin="DCD#" pad="10"/> +<connect gate="G$1" pin="DSR#" pad="9"/> +<connect gate="G$1" pin="DTR#" pad="2"/> +<connect gate="G$1" pin="GND1" pad="7"/> +<connect gate="G$1" pin="GND2" pad="18"/> +<connect gate="G$1" pin="GND3" pad="21"/> +<connect gate="G$1" pin="OSCI" pad="27"/> +<connect gate="G$1" pin="OSCO" pad="28"/> +<connect gate="G$1" pin="RESET#" pad="19"/> +<connect gate="G$1" pin="RI#" pad="6"/> +<connect gate="G$1" pin="RTS#" pad="3"/> +<connect gate="G$1" pin="RXD" pad="5"/> +<connect gate="G$1" pin="TEST" pad="26"/> +<connect gate="G$1" pin="TXD" pad="1"/> +<connect gate="G$1" pin="USBDM" pad="16"/> +<connect gate="G$1" pin="USBDP" pad="15"/> +<connect gate="G$1" pin="VCC" pad="20"/> +<connect gate="G$1" pin="VCCIO" pad="4"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT232RQ" prefix="U" uservalue="yes"> +<description><b>USB UART</b> +<p> +4<sup>th</sup> Generation USB UART (USB &lt;-&gt; Serial) Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT232R" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LQFP32"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="16"/> +<connect gate="G$1" pin="AGND" pad="24"/> +<connect gate="G$1" pin="CBUS0" pad="22"/> +<connect gate="G$1" pin="CBUS1" pad="21"/> +<connect gate="G$1" pin="CBUS2" pad="10"/> +<connect gate="G$1" pin="CBUS3" pad="11"/> +<connect gate="G$1" pin="CBUS4" pad="9"/> +<connect gate="G$1" pin="CTS#" pad="8"/> +<connect gate="G$1" pin="DCD#" pad="7"/> +<connect gate="G$1" pin="DSR#" pad="6"/> +<connect gate="G$1" pin="DTR#" pad="31"/> +<connect gate="G$1" pin="GND1" pad="4"/> +<connect gate="G$1" pin="GND2" pad="17"/> +<connect gate="G$1" pin="GND3" pad="20"/> +<connect gate="G$1" pin="OSCI" pad="27"/> +<connect gate="G$1" pin="OSCO" pad="28"/> +<connect gate="G$1" pin="RESET#" pad="18"/> +<connect gate="G$1" pin="RI#" pad="3"/> +<connect gate="G$1" pin="RTS#" pad="32"/> +<connect gate="G$1" pin="RXD" pad="2"/> +<connect gate="G$1" pin="TEST" pad="26"/> +<connect gate="G$1" pin="TXD" pad="30"/> +<connect gate="G$1" pin="USBDM" pad="15"/> +<connect gate="G$1" pin="USBDP" pad="14"/> +<connect gate="G$1" pin="VCC" pad="19"/> +<connect gate="G$1" pin="VCCIO" pad="1"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT245RL"> +<description><b>USB FIFO Controller</b> +<p> +4<sup>th</sup> Generation USB Controller (USB &lt;-&gt; Parallel) - FIFO </p></description> +<gates> +<gate name="G$1" symbol="FT245R" x="0" y="0"/> +</gates> +<devices> +<device name="" package="SSOP28DB"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="17"/> +<connect gate="G$1" pin="AGND" pad="25"/> +<connect gate="G$1" pin="D0" pad="1"/> +<connect gate="G$1" pin="D1" pad="5"/> +<connect gate="G$1" pin="D2" pad="3"/> +<connect gate="G$1" pin="D3" pad="11"/> +<connect gate="G$1" pin="D4" pad="2"/> +<connect gate="G$1" pin="D5" pad="9"/> +<connect gate="G$1" pin="D6" pad="10"/> +<connect gate="G$1" pin="D7" pad="6"/> +<connect gate="G$1" pin="GND1" pad="7"/> +<connect gate="G$1" pin="GND2" pad="18"/> +<connect gate="G$1" pin="GND3" pad="21"/> +<connect gate="G$1" pin="OSCI" pad="27"/> +<connect gate="G$1" pin="OSCO" pad="28"/> +<connect gate="G$1" pin="PWREN#" pad="12"/> +<connect gate="G$1" pin="RD#" pad="13"/> +<connect gate="G$1" pin="RESET#" pad="19"/> +<connect gate="G$1" pin="RXF#" pad="23"/> +<connect gate="G$1" pin="TEST" pad="26"/> +<connect gate="G$1" pin="TXE#" pad="22"/> +<connect gate="G$1" pin="USBDM" pad="16"/> +<connect gate="G$1" pin="USBDP" pad="15"/> +<connect gate="G$1" pin="VCC" pad="20"/> +<connect gate="G$1" pin="VCCIO" pad="4"/> +<connect gate="G$1" pin="WR" pad="14"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT245RQ" prefix="U" uservalue="yes"> +<description><b>USB FIFO Controller</b> +<p> +4<sup>th</sup> Generation USB Controller (USB &lt;-&gt; Parallel) - FIFO </p></description> +<gates> +<gate name="G$1" symbol="FT245R" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LQFP32"> +<connects> +<connect gate="G$1" pin="3V3OUT" pad="16"/> +<connect gate="G$1" pin="AGND" pad="24"/> +<connect gate="G$1" pin="D0" pad="30"/> +<connect gate="G$1" pin="D1" pad="2"/> +<connect gate="G$1" pin="D2" pad="32"/> +<connect gate="G$1" pin="D3" pad="8"/> +<connect gate="G$1" pin="D4" pad="31"/> +<connect gate="G$1" pin="D5" pad="6"/> +<connect gate="G$1" pin="D6" pad="7"/> +<connect gate="G$1" pin="D7" pad="3"/> +<connect gate="G$1" pin="GND1" pad="4"/> +<connect gate="G$1" pin="GND2" pad="17"/> +<connect gate="G$1" pin="GND3" pad="20"/> +<connect gate="G$1" pin="OSCI" pad="27"/> +<connect gate="G$1" pin="OSCO" pad="28"/> +<connect gate="G$1" pin="PWREN#" pad="9"/> +<connect gate="G$1" pin="RD#" pad="10"/> +<connect gate="G$1" pin="RESET#" pad="18"/> +<connect gate="G$1" pin="RXF#" pad="22"/> +<connect gate="G$1" pin="TEST" pad="26"/> +<connect gate="G$1" pin="TXE#" pad="21"/> +<connect gate="G$1" pin="USBDM" pad="15"/> +<connect gate="G$1" pin="USBDP" pad="14"/> +<connect gate="G$1" pin="VCC" pad="19"/> +<connect gate="G$1" pin="VCCIO" pad="1"/> +<connect gate="G$1" pin="WR" pad="11"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT4232H" prefix="IC"> +<description><b>Quad USB UART</b><br> +5<sup>th</sup> generation USB to 4-port serial controller</description> +<gates> +<gate name="CORE" symbol="4232CORE" x="-15.24" y="-7.62" addlevel="always"/> +<gate name="A" symbol="4232PORT" x="35.56" y="38.1" addlevel="always"/> +<gate name="B" symbol="4232PORT" x="35.56" y="10.16" addlevel="always"/> +<gate name="C" symbol="4232PORT" x="35.56" y="-17.78" addlevel="always"/> +<gate name="D" symbol="4232PORT" x="35.56" y="-45.72" addlevel="always"/> +</gates> +<devices> +<device name="L" package="LQFP64"> +<connects> +<connect gate="A" pin="DB0/TXD" pad="16"/> +<connect gate="A" pin="DB1/RXD" pad="17"/> +<connect gate="A" pin="DB2/RTS" pad="18"/> +<connect gate="A" pin="DB3/CTS" pad="19"/> +<connect gate="A" pin="DB4/DTR" pad="21"/> +<connect gate="A" pin="DB5/DSR" pad="22"/> +<connect gate="A" pin="DB6/DCD" pad="23"/> +<connect gate="A" pin="DB7/RI" pad="24"/> +<connect gate="B" pin="DB0/TXD" pad="26"/> +<connect gate="B" pin="DB1/RXD" pad="27"/> +<connect gate="B" pin="DB2/RTS" pad="28"/> +<connect gate="B" pin="DB3/CTS" pad="29"/> +<connect gate="B" pin="DB4/DTR" pad="30"/> +<connect gate="B" pin="DB5/DSR" pad="32"/> +<connect gate="B" pin="DB6/DCD" pad="33"/> +<connect gate="B" pin="DB7/RI" pad="34"/> +<connect gate="C" pin="DB0/TXD" pad="38"/> +<connect gate="C" pin="DB1/RXD" pad="39"/> +<connect gate="C" pin="DB2/RTS" pad="40"/> +<connect gate="C" pin="DB3/CTS" pad="41"/> +<connect gate="C" pin="DB4/DTR" pad="43"/> +<connect gate="C" pin="DB5/DSR" pad="44"/> +<connect gate="C" pin="DB6/DCD" pad="45"/> +<connect gate="C" pin="DB7/RI" pad="46"/> +<connect gate="CORE" pin="AGND" pad="10"/> +<connect gate="CORE" pin="EECLK" pad="62"/> +<connect gate="CORE" pin="EECS" pad="63"/> +<connect gate="CORE" pin="EEDATA" pad="61"/> +<connect gate="CORE" pin="GND@1" pad="1"/> +<connect gate="CORE" pin="GND@2" pad="5"/> +<connect gate="CORE" pin="GND@3" pad="11"/> +<connect gate="CORE" pin="GND@4" pad="15"/> +<connect gate="CORE" pin="GND@5" pad="25"/> +<connect gate="CORE" pin="GND@6" pad="35"/> +<connect gate="CORE" pin="GND@7" pad="47"/> +<connect gate="CORE" pin="GND@8" pad="51"/> +<connect gate="CORE" pin="PWREN#" pad="60"/> +<connect gate="CORE" pin="REF" pad="6"/> +<connect gate="CORE" pin="RESET#" pad="14"/> +<connect gate="CORE" pin="SUSPEND#" pad="36"/> +<connect gate="CORE" pin="TEST" pad="13"/> +<connect gate="CORE" pin="USBDM" pad="7"/> +<connect gate="CORE" pin="USBDP" pad="8"/> +<connect gate="CORE" pin="VCCIO@1" pad="20"/> +<connect gate="CORE" pin="VCCIO@2" pad="31"/> +<connect gate="CORE" pin="VCCIO@3" pad="42"/> +<connect gate="CORE" pin="VCCIO@4" pad="56"/> +<connect gate="CORE" pin="VCORE@1" pad="12"/> +<connect gate="CORE" pin="VCORE@2" pad="37"/> +<connect gate="CORE" pin="VCORE@3" pad="64"/> +<connect gate="CORE" pin="VPHY" pad="4"/> +<connect gate="CORE" pin="VPLL" pad="9"/> +<connect gate="CORE" pin="VREGIN" pad="50"/> +<connect gate="CORE" pin="VREGOUT" pad="49"/> +<connect gate="CORE" pin="XTIN" pad="2"/> +<connect gate="CORE" pin="XTOUT" pad="3"/> +<connect gate="D" pin="DB0/TXD" pad="48"/> +<connect gate="D" pin="DB1/RXD" pad="52"/> +<connect gate="D" pin="DB2/RTS" pad="53"/> +<connect gate="D" pin="DB3/CTS" pad="54"/> +<connect gate="D" pin="DB4/DTR" pad="55"/> +<connect gate="D" pin="DB5/DSR" pad="57"/> +<connect gate="D" pin="DB6/DCD" pad="58"/> +<connect gate="D" pin="DB7/RI" pad="59"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="VNC1L" prefix="IC"> +<description>Dual USB Host Controller Vinculum</description> +<gates> +<gate name="G$1" symbol="VNC1L" x="0" y="0"/> +</gates> +<devices> +<device name="-1A" package="LQFP48"> +<connects> +<connect gate="G$1" pin="ACBUS0" pad="41"/> +<connect gate="G$1" pin="ACBUS1" pad="42"/> +<connect gate="G$1" pin="ACBUS2" pad="43"/> +<connect gate="G$1" pin="ACBUS3" pad="44"/> +<connect gate="G$1" pin="ACBUS4" pad="45"/> +<connect gate="G$1" pin="ACBUS5" pad="46"/> +<connect gate="G$1" pin="ACBUS6" pad="47"/> +<connect gate="G$1" pin="ACBUS7" pad="48"/> +<connect gate="G$1" pin="ADBUS0" pad="31"/> +<connect gate="G$1" pin="ADBUS1" pad="32"/> +<connect gate="G$1" pin="ADBUS2" pad="33"/> +<connect gate="G$1" pin="ADBUS3" pad="34"/> +<connect gate="G$1" pin="ADBUS4" pad="35"/> +<connect gate="G$1" pin="ADBUS5" pad="36"/> +<connect gate="G$1" pin="ADBUS6" pad="37"/> +<connect gate="G$1" pin="ADBUS7" pad="38"/> +<connect gate="G$1" pin="AGND" pad="6"/> +<connect gate="G$1" pin="AVCC" pad="3"/> +<connect gate="G$1" pin="BCBUS0" pad="20"/> +<connect gate="G$1" pin="BCBUS1" pad="21"/> +<connect gate="G$1" pin="BCBUS2" pad="22"/> +<connect gate="G$1" pin="BCBUS3" pad="23"/> +<connect gate="G$1" pin="BDBUS0" pad="11"/> +<connect gate="G$1" pin="BDBUS1" pad="12"/> +<connect gate="G$1" pin="BDBUS2" pad="13"/> +<connect gate="G$1" pin="BDBUS3" pad="14"/> +<connect gate="G$1" pin="BDBUS4" pad="15"/> +<connect gate="G$1" pin="BDBUS5" pad="16"/> +<connect gate="G$1" pin="BDBUS6" pad="18"/> +<connect gate="G$1" pin="BDBUS7" pad="19"/> +<connect gate="G$1" pin="GND@1" pad="1"/> +<connect gate="G$1" pin="GND@2" pad="24"/> +<connect gate="G$1" pin="GND@3" pad="27"/> +<connect gate="G$1" pin="GND@4" pad="39"/> +<connect gate="G$1" pin="PLLFLTR" pad="7"/> +<connect gate="G$1" pin="PROG#" pad="10"/> +<connect gate="G$1" pin="RESET#" pad="9"/> +<connect gate="G$1" pin="TEST" pad="8"/> +<connect gate="G$1" pin="USB1DM" pad="26"/> +<connect gate="G$1" pin="USB1DP" pad="25"/> +<connect gate="G$1" pin="USB2DM" pad="29"/> +<connect gate="G$1" pin="USB2DP" pad="28"/> +<connect gate="G$1" pin="VCC" pad="2"/> +<connect gate="G$1" pin="VCCIO@1" pad="40"/> +<connect gate="G$1" pin="VCCIO@2" pad="30"/> +<connect gate="G$1" pin="VCCIO@3" pad="17"/> +<connect gate="G$1" pin="XTIN" pad="4"/> +<connect gate="G$1" pin="XTOUT" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="VNC2-32" prefix="IC"> +<description><b>Vinculum-II</b> +<p> +2<sup>nd</sup> Generation Dual USB Host Controller +</p></description> +<gates> +<gate name="G$1" symbol="VNC2-32" x="0" y="0"/> +</gates> +<devices> +<device name="L1B" package="LQFP32"> +<connects> +<connect gate="G$1" pin="GND@1" pad="1"/> +<connect gate="G$1" pin="GND@2" pad="16"/> +<connect gate="G$1" pin="GND@3" pad="19"/> +<connect gate="G$1" pin="GND@4" pad="27"/> +<connect gate="G$1" pin="GNDPLL" pad="6"/> +<connect gate="G$1" pin="IOBUS0" pad="11"/> +<connect gate="G$1" pin="IOBUS1" pad="12"/> +<connect gate="G$1" pin="IOBUS10" pad="31"/> +<connect gate="G$1" pin="IOBUS11" pad="32"/> +<connect gate="G$1" pin="IOBUS2" pad="14"/> +<connect gate="G$1" pin="IOBUS3" pad="15"/> +<connect gate="G$1" pin="IOBUS4" pad="23"/> +<connect gate="G$1" pin="IOBUS5" pad="24"/> +<connect gate="G$1" pin="IOBUS6" pad="25"/> +<connect gate="G$1" pin="IOBUS7" pad="26"/> +<connect gate="G$1" pin="IOBUS8" pad="29"/> +<connect gate="G$1" pin="IOBUS9" pad="30"/> +<connect gate="G$1" pin="PROG#" pad="9"/> +<connect gate="G$1" pin="RESET#" pad="10"/> +<connect gate="G$1" pin="TEST" pad="8"/> +<connect gate="G$1" pin="USB1DM" pad="18"/> +<connect gate="G$1" pin="USB1DP" pad="17"/> +<connect gate="G$1" pin="USB2DM" pad="21"/> +<connect gate="G$1" pin="USB2DP" pad="20"/> +<connect gate="G$1" pin="VCCIO@1" pad="28"/> +<connect gate="G$1" pin="VCCIO@2" pad="22"/> +<connect gate="G$1" pin="VCCIO@3" pad="13"/> +<connect gate="G$1" pin="VCCPLL_IN" pad="3"/> +<connect gate="G$1" pin="VREG_IN" pad="2"/> +<connect gate="G$1" pin="VREG_OUT" pad="7"/> +<connect gate="G$1" pin="XTIN" pad="4"/> +<connect gate="G$1" pin="XTOUT" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="VNC2-48" prefix="IC"> +<description><b>Vinculum-II</b> +<p> +2<sup>nd</sup> Generation Dual USB Host Controller +</p> +<p> +48-pin device symbol is compatible<sup>*</sup> with VNC1L symbol to allow easy replacement on schematic. +</p> +<p> +<sup>*</sup>please be noticed that VREG_OUT pin in VNC2 <u>has different</u> functionality than PLLFLTR pin in VNC1L. +</p></description> +<gates> +<gate name="G$1" symbol="VNC2-48" x="0" y="0"/> +</gates> +<devices> +<device name="L1B" package="LQFP48"> +<connects> +<connect gate="G$1" pin="GND@1" pad="1"/> +<connect gate="G$1" pin="GND@2" pad="24"/> +<connect gate="G$1" pin="GND@3" pad="27"/> +<connect gate="G$1" pin="GND@4" pad="39"/> +<connect gate="G$1" pin="GNDPLL" pad="6"/> +<connect gate="G$1" pin="IOBUS0" pad="11"/> +<connect gate="G$1" pin="IOBUS1" pad="12"/> +<connect gate="G$1" pin="IOBUS10" pad="22"/> +<connect gate="G$1" pin="IOBUS11" pad="23"/> +<connect gate="G$1" pin="IOBUS12" pad="31"/> +<connect gate="G$1" pin="IOBUS13" pad="32"/> +<connect gate="G$1" pin="IOBUS14" pad="33"/> +<connect gate="G$1" pin="IOBUS15" pad="34"/> +<connect gate="G$1" pin="IOBUS16" pad="35"/> +<connect gate="G$1" pin="IOBUS17" pad="36"/> +<connect gate="G$1" pin="IOBUS18" pad="37"/> +<connect gate="G$1" pin="IOBUS19" pad="38"/> +<connect gate="G$1" pin="IOBUS2" pad="13"/> +<connect gate="G$1" pin="IOBUS20" pad="41"/> +<connect gate="G$1" pin="IOBUS21" pad="42"/> +<connect gate="G$1" pin="IOBUS22" pad="43"/> +<connect gate="G$1" pin="IOBUS23" pad="44"/> +<connect gate="G$1" pin="IOBUS24" pad="45"/> +<connect gate="G$1" pin="IOBUS25" pad="46"/> +<connect gate="G$1" pin="IOBUS26" pad="47"/> +<connect gate="G$1" pin="IOBUS27" pad="48"/> +<connect gate="G$1" pin="IOBUS3" pad="14"/> +<connect gate="G$1" pin="IOBUS4" pad="15"/> +<connect gate="G$1" pin="IOBUS5" pad="16"/> +<connect gate="G$1" pin="IOBUS6" pad="18"/> +<connect gate="G$1" pin="IOBUS7" pad="19"/> +<connect gate="G$1" pin="IOBUS8" pad="20"/> +<connect gate="G$1" pin="IOBUS9" pad="21"/> +<connect gate="G$1" pin="PROG#" pad="10"/> +<connect gate="G$1" pin="RESET#" pad="9"/> +<connect gate="G$1" pin="TEST" pad="8"/> +<connect gate="G$1" pin="USB1DM" pad="26"/> +<connect gate="G$1" pin="USB1DP" pad="25"/> +<connect gate="G$1" pin="USB2DM" pad="29"/> +<connect gate="G$1" pin="USB2DP" pad="28"/> +<connect gate="G$1" pin="VCCIO@1" pad="40"/> +<connect gate="G$1" pin="VCCIO@2" pad="30"/> +<connect gate="G$1" pin="VCCIO@3" pad="17"/> +<connect gate="G$1" pin="VCCPLL_IN" pad="3"/> +<connect gate="G$1" pin="VREG_IN" pad="2"/> +<connect gate="G$1" pin="VREG_OUT" pad="7"/> +<connect gate="G$1" pin="XTIN" pad="4"/> +<connect gate="G$1" pin="XTOUT" pad="5"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="VNC2-64" prefix="IC"> +<description><b>Vinculum-II</b> +<p> +2<sup>nd</sup> Generation Dual USB Host Controller +</p></description> +<gates> +<gate name="CORE" symbol="VNC2-64CORE" x="-15.24" y="0" addlevel="always"/> +<gate name="A" symbol="VNC2-64PORT1" x="20.32" y="58.42" addlevel="always"/> +<gate name="B" symbol="VNC2-64PORT2" x="20.32" y="30.48" addlevel="always"/> +<gate name="C" symbol="VNC2-64PORT3" x="20.32" y="2.54" addlevel="always"/> +<gate name="D" symbol="VNC2-64PORT4" x="20.32" y="-25.4" addlevel="always"/> +<gate name="E" symbol="VNC2-64PORT5" x="20.32" y="-53.34" addlevel="always"/> +<gate name="F" symbol="VNC2-64PORT6" x="20.32" y="-76.2" addlevel="always"/> +</gates> +<devices> +<device name="L1B" package="LQFP64"> +<connects> +<connect gate="A" pin="IOBUS0" pad="11"/> +<connect gate="A" pin="IOBUS1" pad="12"/> +<connect gate="A" pin="IOBUS2" pad="13"/> +<connect gate="A" pin="IOBUS3" pad="14"/> +<connect gate="A" pin="IOBUS4" pad="15"/> +<connect gate="A" pin="IOBUS5" pad="16"/> +<connect gate="A" pin="IOBUS6" pad="17"/> +<connect gate="A" pin="IOBUS7" pad="18"/> +<connect gate="B" pin="IOBUS10" pad="22"/> +<connect gate="B" pin="IOBUS11" pad="23"/> +<connect gate="B" pin="IOBUS12" pad="24"/> +<connect gate="B" pin="IOBUS13" pad="25"/> +<connect gate="B" pin="IOBUS14" pad="26"/> +<connect gate="B" pin="IOBUS15" pad="27"/> +<connect gate="B" pin="IOBUS8" pad="19"/> +<connect gate="B" pin="IOBUS9" pad="20"/> +<connect gate="C" pin="IOBUS16" pad="28"/> +<connect gate="C" pin="IOBUS17" pad="29"/> +<connect gate="C" pin="IOBUS18" pad="31"/> +<connect gate="C" pin="IOBUS19" pad="32"/> +<connect gate="C" pin="IOBUS20" pad="39"/> +<connect gate="C" pin="IOBUS21" pad="40"/> +<connect gate="C" pin="IOBUS22" pad="41"/> +<connect gate="C" pin="IOBUS23" pad="42"/> +<connect gate="CORE" pin="GND@1" pad="1"/> +<connect gate="CORE" pin="GND@2" pad="30"/> +<connect gate="CORE" pin="GND@3" pad="35"/> +<connect gate="CORE" pin="GND@4" pad="53"/> +<connect gate="CORE" pin="GNDPLL" pad="6"/> +<connect gate="CORE" pin="PROG#" pad="10"/> +<connect gate="CORE" pin="RESET#" pad="9"/> +<connect gate="CORE" pin="TEST" pad="8"/> +<connect gate="CORE" pin="USB1DM" pad="34"/> +<connect gate="CORE" pin="USB1DP" pad="33"/> +<connect gate="CORE" pin="USB2DM" pad="37"/> +<connect gate="CORE" pin="USB2DP" pad="36"/> +<connect gate="CORE" pin="VCCIO@1" pad="54"/> +<connect gate="CORE" pin="VCCIO@2" pad="38"/> +<connect gate="CORE" pin="VCCIO@3" pad="21"/> +<connect gate="CORE" pin="VCCPLL_IN" pad="3"/> +<connect gate="CORE" pin="VREG_IN" pad="2"/> +<connect gate="CORE" pin="VREG_OUT" pad="7"/> +<connect gate="CORE" pin="XTIN" pad="4"/> +<connect gate="CORE" pin="XTOUT" pad="5"/> +<connect gate="D" pin="IOBUS24" pad="43"/> +<connect gate="D" pin="IOBUS25" pad="44"/> +<connect gate="D" pin="IOBUS26" pad="45"/> +<connect gate="D" pin="IOBUS27" pad="46"/> +<connect gate="D" pin="IOBUS28" pad="47"/> +<connect gate="D" pin="IOBUS29" pad="48"/> +<connect gate="D" pin="IOBUS30" pad="49"/> +<connect gate="D" pin="IOBUS31" pad="50"/> +<connect gate="E" pin="IOBUS32" pad="51"/> +<connect gate="E" pin="IOBUS33" pad="52"/> +<connect gate="E" pin="IOBUS34" pad="55"/> +<connect gate="E" pin="IOBUS35" pad="56"/> +<connect gate="E" pin="IOBUS36" pad="57"/> +<connect gate="E" pin="IOBUS37" pad="58"/> +<connect gate="E" pin="IOBUS38" pad="59"/> +<connect gate="E" pin="IOBUS39" pad="60"/> +<connect gate="F" pin="IOBUS40" pad="61"/> +<connect gate="F" pin="IOBUS41" pad="62"/> +<connect gate="F" pin="IOBUS42" pad="63"/> +<connect gate="F" pin="IOBUS43" pad="64"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +<deviceset name="FT232H" prefix="IC"> +<description><b>FTDI FT232H</b> +<p> +High Speed USB 2.0 Slave Controller +</p></description> +<gates> +<gate name="G$1" symbol="FT232H" x="0" y="0"/> +</gates> +<devices> +<device name="" package="LQFP48"> +<connects> +<connect gate="G$1" pin="ACBUS0" pad="21"/> +<connect gate="G$1" pin="ACBUS1" pad="25"/> +<connect gate="G$1" pin="ACBUS2" pad="26"/> +<connect gate="G$1" pin="ACBUS3" pad="27"/> +<connect gate="G$1" pin="ACBUS4" pad="28"/> +<connect gate="G$1" pin="ACBUS5" pad="29"/> +<connect gate="G$1" pin="ACBUS6" pad="30"/> +<connect gate="G$1" pin="ACBUS7" pad="31"/> +<connect gate="G$1" pin="ACBUS8" pad="32"/> +<connect gate="G$1" pin="ACBUS9" pad="33"/> +<connect gate="G$1" pin="ADBUS0" pad="13"/> +<connect gate="G$1" pin="ADBUS1" pad="14"/> +<connect gate="G$1" pin="ADBUS2" pad="15"/> +<connect gate="G$1" pin="ADBUS3" pad="16"/> +<connect gate="G$1" pin="ADBUS4" pad="17"/> +<connect gate="G$1" pin="ADBUS5" pad="18"/> +<connect gate="G$1" pin="ADBUS6" pad="19"/> +<connect gate="G$1" pin="ADBUS7" pad="20"/> +<connect gate="G$1" pin="AGND1" pad="4"/> +<connect gate="G$1" pin="AGND2" pad="9"/> +<connect gate="G$1" pin="AGND3" pad="41"/> +<connect gate="G$1" pin="DM" pad="6"/> +<connect gate="G$1" pin="DP" pad="7"/> +<connect gate="G$1" pin="EECLK" pad="44"/> +<connect gate="G$1" pin="EECS" pad="45"/> +<connect gate="G$1" pin="EEDATA" pad="43"/> +<connect gate="G$1" pin="GND1" pad="10"/> +<connect gate="G$1" pin="GND2" pad="11"/> +<connect gate="G$1" pin="GND3" pad="22"/> +<connect gate="G$1" pin="GND4" pad="23"/> +<connect gate="G$1" pin="GND5" pad="35"/> +<connect gate="G$1" pin="GND6" pad="36"/> +<connect gate="G$1" pin="GND7" pad="47"/> +<connect gate="G$1" pin="GND8" pad="48"/> +<connect gate="G$1" pin="REF" pad="5"/> +<connect gate="G$1" pin="RESET#" pad="34"/> +<connect gate="G$1" pin="TEST" pad="42"/> +<connect gate="G$1" pin="VCCA" pad="37"/> +<connect gate="G$1" pin="VCCCORE" pad="38"/> +<connect gate="G$1" pin="VCCD" pad="39"/> +<connect gate="G$1" pin="VCCIO1" pad="12"/> +<connect gate="G$1" pin="VCCIO2" pad="24"/> +<connect gate="G$1" pin="VCCIO3" pad="46"/> +<connect gate="G$1" pin="VPHY" pad="3"/> +<connect gate="G$1" pin="VPLL" pad="8"/> +<connect gate="G$1" pin="VREGIN" pad="40"/> +<connect gate="G$1" pin="XCSI" pad="1"/> +<connect gate="G$1" pin="XCSO" pad="2"/> +</connects> +<technologies> +<technology name=""/> +</technologies> +</device> +</devices> +</deviceset> +</devicesets> +</library> +</drawing> +</eagle> |